Internal Use Only
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LED TV
SERVICE MANUAL
CHASSIS : LD58H
MODEL : 43UF67** 43UF67**-Z*
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL68682110 (1505-REV00) Printed in Korea
CONTENTS
CONTENTS ............................................................................................... 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS .................................................................... 4
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION .............................................................. 10
BLOCK DIAGRAM .................................................................................. 18
EXPLODED VIEW ................................................................................... 19
SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX
TROUBLE SHOOTING GUIDE ................................................. APPENDIX
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
Always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder
on page 3 of this publication, always follow the safety precau- ES devices.
tions. Remember: Safety First. 4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug (Most replacement ES devices are packaged with leads elec-
or other electrical connection. trically shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective mate-
installation of electrolytic capacitors may result in an explo- rial to the chassis or circuit assembly into which the device will
sion hazard. be installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or cir-
high voltage meter or other voltage measuring device (DVM, cuit, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropri-
(by volume) isopropyl alcohol (90 % - 99 % strength) ate tip size and shape that will maintain tip temperature within
CAUTION: This is a flammable mixture. the range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication 2. Use an appropriate gauge of RMA resin-core solder composed
of contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks Do not use freon-propelled spray-on cleaners.
are correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand
ily by static electricity. Such components commonly are called against the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharg-
ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
Copyright © LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed when-
gently prying up on the lead with the soldering iron tip as the ever this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. Carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remain- good copper pattern. Solder the overlapped area and clip off
ing on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
Copyright © LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method
This specification is applied to the LED TV used LD58H 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC specification
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Model General Specification
No. Item Specification Remarks
1 Market EU(PAL Market-37Countries) DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) :37 countries
UK/Italy/Germany/France/Spain/Sweden/Finland/Netherlands/
Belgium/Luxemburg/ Greece/Denmark/Czech/Austria /Hun-
gary/Swiss/Croatia/TurkeyNorway/Slovenia/Poland/Ukraine/
Portugal/Ireland/Morocco/Latvia/Estonia/Lithania/Rumania/
Bulgaria/Russia/SlovakiaBosnia/Serbia/Albania/Kazakhstan/
Belarus
DTV (MPEG2/4, DVB-T2): 8 countries
UK/Denmark/Sweden/Finland/Norway/Ireland/Ukraine/Kaza-
khstan
DTV (MPEG2/4, DVB-C): 37 countries
UK/Italy/Germany/France/Spain/Sweden/Finland/Netherlands/
Belgium/Luxemburg/ Greece/Denmark/Czech/Austria /Hun-
gary/Swiss/Croatia/TurkeyNorway/Slovenia/Poland /Ukraine/
Portugal/Ireland/Morocco/Latvia/Estonia/Lithania/Rumania/
Bulgaria/Russia/SlovakiaBosnia/Serbia/Albania/Kazakhstan/
Belarus
DTV (MPEG2/4,DVB-S): 29 countries
Italy/Germany/France/Spain/Netherlands/ Belgium/Luxemburg/
Greece/Czech/Austria /Hungary/Swiss/Croatia/Turkey/Slove-
nia/Poland/Portugal/ Morocco/Latvia/Estonia/Lithania/Rumania/
Bulgaria/Russia/Slovakia/Bosnia/Serbia/Albania/Belarus
Supported satellite : 22 satellites
HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102,
ATLANTIC BIRD 3, AMOS 2/3, THOR 5/6, IRIUS 4, EUTEL-
SAT-W3A, EUROBIRD 9A, EUTELSAT-W2A, HOTBIRD 6/8/9,
EUTELSAT-SESAT, ASTRA 1L/H/M/KR, ASTRA 3A/3B, BADR
4/6, ASTRA 2D, EUROBIRD 3, EUTELSAT-W7, HELLASSAT
2, EXPRESS AM1, TURKSAT 2A/3A, INTERSAT10
Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
No. Item Specification Remarks
Analogue TV Analogue TV :
1) PAL-B/G/D/K/I (RF) VHF: E2 to E12, UHF : E21 to E69
2) SECAM-B/G/D/K/I, SECAM L/L’ (CATV) S1 to S20, HYPER: S21 to S47
Digital TV Digital TV :VHF, UHF
1) DVB-T
2 Broadcasting system
2) DVB-C
Satellite Digital TV Satellite TV :
1) DVB-T/T2 VHF, UHF,
2) DVB-C C-Band, Ku-Band
3) DVB-S/S2
► DVB-T
- Guard Interval(Bitrate_Mbit/s) : 1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval(Bitrate_Mbit/s)
: 1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
Analog : Upper Heterodyne
3 Receiving system 64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
Digital : COFDM, QAM
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45 Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
4 Scart Jack (1EA) PAL, SECAM Scart 1 Jack is Full scart and support RF-OUT(analog).
Component & AV Video Input RCA(PAL, SECAM, NTSC) 4 System : PAL, SECAM, NTSC, PAL60
5
Common port (1EA) Component Input(Y/Cb/Cr, Y/Pb/Pr)
6 HDMI Input (2EA) HDMI1/2 Support HDCP2.2 , 6Gbps
7 Audio Input (1EA) Component & AV Component & AV’s audio input is used by common port.
8 SDPIF out (1EA) SPDIF out
Antenna, AV1, AV2, Component, HDMI1,
9 Earphone out (1EA) UF67 Series
HDMI2, USB
10 USB (1EA) EMF, DivX HD, For SVC (download) JPEG, MP3, DivX HD
CI : U
K, Finland, Denmark, Norway, Sweden, Russia, Spain,
DVB-T Ireland, Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
11 DVB CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
DVB-C CI+ : S
witzerland(UPC,Cablecom), Netherland(Ziggo),
Germany(KDG,CWB), Finland(labwise)
DVB-S CI + : Germany(Astra HD+ )
12 Ethernet (1EA) Wired, DMP only Only UK T2 Model : for MHEG
Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
5. Video resolutions (2D)
5.1. Component Input (Y, CB/PB, CR/PR)
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed
1 720*576 15.625 50.00 13.5 SDTV ,DVD 576I
2 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
3 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
4 720*576 31.25 50.00 27.00 SDTV 576P
5 720*480 31.50 60.00 27.027 SDTV 480P
6 720*480 31.47 59.94 27.00 SDTV 480P
7 1280*720 37.50 50.00 74.25 HDTV 720P
8 1280*720 45.00 60.00 74.25 HDTV 720P
9 1280*720 44.96 59.94 74.176 HDTV 720P
10 1920*1080 28.125 50.00 74.25 HDTV 1080I
11 1920*1080 33.75 60.00 74.25 HDTV 1080I
12 1920*1080 33.72 59.94 74.176 HDTV 1080I
13 1920*1080 56.25 50.00 148.50 HDTV 1080P
14 1920*1080 67.50 60.00 148.50 HDTV 1080P
15 1920*1080 67.432 59.94 148.352 HDTV 1080P
16 1920*1080 27.00 24.00 74.25 HDTV 1080P
17 1920*1080 26.97 23.94 74.176 HDTV 1080P
18 1920*1080 33.75 30.00 74.25 HDTV 1080P
19 1920*1080 33.71 29.97 74.176 HDTV 1080P
Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
5.2. HDMI Input(PC/DTV)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
PC(DVI) DDC
1 640*350 31.46 70.09 25.17 EGA X
2 720*400 31.46 70.08 28.32 DOS O
3 640*480 31.46 59.94 25.17 VESA(VGA) O
4 800*600 37.87 60.31 40.00 VESA(SVGA) O
5 1024*768 48.36 60.00 65.00 VESA(XGA) O
6 1152*864 54.34 60.05 80.00 VESA O
7 1360*768 47.71 60.01 85.50 VESA (WXGA) O
8 1280*1024 63.98 60.02 108.0 VESA (SXGA) O FHD Only
9 1920*1080 67.50 60.00 148.5 HDTV 1080P O FHD Only
10 3840*2160 54 24.00 297.00 UDTV 2160P O UHD Only
11 3840*2160 56.25 25.00 297.00 UDTV 2160P O UHD Only
12 3840*2160 67.5 30.00 297.00 UDTV 2160P O UHD Only
13 4096*2160 53.95 23.97 296.703 UDTV 2160P O UHD Only
14 4096*2160 54 24 297 UDTV 2160P O UHD Only
DTV
1 640*480 31.46 59.94 25.125 SDTV 480P
2 640*480 31.5 60.00 25.125 SDTV 480P
3 720*480 15.73 59.94 13.500 SDTV 480I
4 720*480 15.75 60.00 13.514 SDTV 480I Spec. out but display
5 720*576 15.62 50.00 13.500 SDTV 576I(DVB)
6 720*480 31.47 59.94 27 SDTV 480P
7 720*480 31.5 60.00 27.027 SDTV 480P
8 720*576 31.25 50.00 27 HDTV 576P(DVB)
9 1280*720 44.96 59.94 74.176 HDTV 720P
10 1280*720 45 60.00 74.25 HDTV 720P
11 1280*720 37.5 50.00 74.25 HDTV 720P(DVB)
12 1920*1080 28.12 50.00 74.25 HDTV 1080I(DVB)
13 1920*1080 33.72 59.94 74.176 HDTV 1080I
14 1920*1080 33.75 60.00 74.25 HDTV 1080I
15 1920*1080 26.97 23.97 63.296 HDTV 1080P
16 1920*1080 27.00 24.00 63.36 HDTV 1080P
17 1920*1080 33.71 29.97 79.120 HDTV 1080P
18 1920*1080 33.75 30.00 79.20 HDTV 1080P
19 1920*1080 56.25 50.00 148.5 HDTV 1080P (DVB)
20 1920*1080 67.43 59.94 148.350 HDTV 1080P
21 1920*1080 67.5 60.00 148.50 HDTV 1080P
22 3840*2160 53.95 23.98 296.703 UDTV 2160P UHD only
23 3840*2160 54 24.00 297.00 UDTV 2160P UHD only
24 3840*2160 56.25 25.00 297.00 UDTV 2160P UHD only
25 3840*2160 61.43 29.97 296.703 UDTV 2160P UHD only
26 3840*2160 67.5 30.00 297.00 UDTV 2160P UHD only
27 3840*2160 112.5 50.00 594 UDTV 2160P(DVB) UHD only
28 3840*2160 135 59.94 593.407 UDTV 2160P UHD only
29 3840*2160 135 60.00 594 UDTV 2160P UHD only
30 4096*2160 53.95 23.98 296.703 UDTV 2160P UHD only
31 4096*2160 54 24.00 297 UDTV 2160P UHD only
32 4096*2160 56.25 25.00 297 UDTV 2160P UHD only
33 4096*2160 61.43 29.97 296.703 UDTV 2160P UHD only
34 4096*2160 67.5 30.00 297 UDTV 2160P UHD only
35 4096*2160 112.5 50.00 594 UDTV 2160P(DVB) UHD only
36 4096*2160 135 59.94 593.407 UDTV 2160P UHD only
37 4096*2160 135 60.00 594 UDTV 2160P UHD only
Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range (4) Click "Connect" tab. If "Can't" is displayed, check connection
between computer, jig, and set.
This specification sheet is applied to all of the LED TV with
LD58H chassis.
(2) (3)
2. Designation
(1) T he adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation : Above 5 Minutes (Heat Run) Please Check the Speed :
Temperature : at 25 °C ± 5 °C To use speed between
Relative humidity : 65 ± 10 % from 200KHz to 400KHz
Input voltage : 220 V, 60 Hz
(6) Adjustment equipments: Color Analyzer(CA-210 or CA-110), (5) Click "Auto" tab and set as below.
DDC Adjustment Jig, Service remote control. (6) Click "Run".
(7) Push the "IN STOP" key - For memory initialization. (7) After downloading, check "OK" message.
Case1 : Software version up
(4)
1. After downloading S/W by USB , TV set will reboot
automatically. filexxx.bin
2. Push “In-stop” key. (5)
3. Push “Power on” key.
4. Function inspection
5. After function inspection, Push “In-stop” key. (7)...........OK
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
“In-stop” key at first. (6)
2. Push “Power on” key for turning it on.
→ If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
* USB DOWNLOAD
(1) Put the USB Stick to the USB socket.
(2) Automatically detecting update file in USB Stick.
3. Main PCB check process - If your downloaded program version in USB Stick is Low,
▪ APC - After Manual-Insert, executing APC it didn't work. But your downloaded version is High, USB
data is automatically detecting.
(3) Show the message "Copying files from memory".
* Boot file Download (4) Updating is starting.
(1) Execute ISP program "Mstar ISP Utility" and then click
"Config" tab.
(2) Set as below, and then click "Auto Detect" and check "OK"
message.
If "Error" is displayed, check connection between computer,
jig, and set.
(3) Click "Read" tab, and then load download file(XXXX.bin)
by clicking "Read". (5) Updating Completed, The TV will restart automatically in 5
seconds.
(1) (6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
filexxx.bin * If downloading version is more new than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
* After downloading, have to adjust Tool Option again. 3.3. EDID data
(1) Push "IN-START" key in service remote control. (1) UHD HDMI1 EDID data (2D, AC3, 6G)
(2) Select "Tool Option 1" and push "OK" key. 0 1 2 3 4 5 6 7 8 9 A B C D E F
(3) Punch in the number. (Each model has their number) 00 00 FF FF FF FF FF FF 00 1E 6D a b
(4) Completed selecting Tool option. 01 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
3.1. ADC Process(Optional) 03
04
01 01
8A 00
01
40
01
84
01
63
01
00
08
00
E8
1E
00
02
30
3A
F2
80
70
18
5A
71
80
38
B0
2D
58
40
* If ADC processes as OTP, There is no need to proceed 05 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
internal ADC. 06 3E 1E 88 3C 00 0A 20 20 20 20 20 20 d
- Enter Service Mode by pushing "ADJ" key, 07 d 01 e
- Enter Internal ADC mode by pushing "►" key at "8. ADC 08 02 03 44 F1 58 10 9F 04 13 05 14 03 02 12 20 21
Calibration". 09 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 26 15 07
EZ ADJUST ADC Calibration 0A 50 09 57 07 f
0. Tool Option1 ADC Comp 480i OK 0B f 67 D8 5D C4 01 78 80 03 E3 05 C0 00 E4
1. Tool Option2
2. Tool Option3
ADC Comp 1080p OK 0C 0F 00 C0 18 66 21 50 B0 51 00 1B 30 40 70 36 00
ADC Type ◄ OTP ►
3. Tool Option4 0D 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E 20 6E 28
Start Reset
4. Tool Option5 0E 55 00 40 84 63 00 00 1E 00 00 00 00 00 00 00 00
5. Tool Option6
6. Country Group
0F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e
7. Area Option
8.ADC Calibration
9. White Balance
►
(2) UHD HDMI2 EDID data (2D, AC3, 3G)
10. 10 Point WB 0 1 2 3 4 5 6 7 8 9 A B C D E F
11. Test Pattern
00 00 FF FF FF FF FF FF 00 1E 6D a b
12 EDID D/L
13. Sub B/C
01 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
14. Ext. Input Adjust 02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
U sing "P-ONLY" key of the Adjustment remote
05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
control, power on TV. 06 3E 1E 53 10 00 0A 20 20 20 20 20 20 d
07 d 01 e
* ADC Calibration Protocol (RS232) 08 02 03 39 F1 54 10 9F 04 13 05 14 03 02 12 20 21
NO Item CMD 1 CMD 2 Data 0 09 22 15 01 5D 5E 5F 62 63 64 26 15 07 50 09 57 07
Enter Adjust Adjust When transfer the ‘Mode In’, 0A f E3
A A 0 0
MODE ‘Mode In’ Carry the command.
0B 05 C0 00 E5 0E 60 61 65 66 01 1D 80 18 71 1C 16
ADC Automatically adjustment
ADC adjust A D 1 0 0C 20 58 2C 25 00 40 84 63 00 00 9E 01 1D 00 72 51
Adjust (The use of a internal pattern)
0D D0 1E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00
0E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Adjust Sequence 0F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e
▪ aa 00 00 [Enter Adjust Mode]
▪ xb 00 40 [Component Input] (3) UHD HDMI1 EDID data(2D, DTS, 6G)
▪ ad 00 10 [Adjust 480i & 1080p Comp] 0 1 2 3 4 5 6 7 8 9 A B C D E F
▪ aa 00 90 End Adjust mode 00 00 FF FF FF FF FF FF 00 1E 6D a b
* Required equipment : Adjustment remote control. 01 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
03 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58
3.2. EDID Download 04 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
▪ After enter Service Mode by pushing "ADJ" key. 05 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
▪ Enter EDID D/L menu. 06 3E 1E 88 3C 00 0A 20 20 20 20 20 20 d
▪ Enter "START" by pushing "OK" key. 07 d 01 e
EZ ADJUST EDID D/L 08 02 03 47 F1 58 10 9F 04 13 05 14 03 02 12 20 21
0. Tool Option1 HDMI1 NG
1. Tool Option2
09 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 29 3D 06
HDMI2 NG
2. Tool Option3 Start Reset 0A C0 15 07 50 09 57 07 f
3. Tool Option4
4. Tool Option5
0B f 67 D8 5D C4 01 78 80 03 E3 05
5. Tool Option6 0C C0 00 E4 0F 00 C0 18 66 21 50 B0 51 00 1B 30 40
6. Country Group
7. Area Option
0D 70 36 00 40 84 63 00 00 1E 01 1D 00 72 51 D0 1E
8. ADC Calibration 0E 20 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00
9. White Balance
0F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e
10. 10 Point WB
11. Test Pattern
12. EDID D/L ►
13. Sub B/C
14. Ext. Input Adjust
Never connect HDMI cable when EDID downloaded.
Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
(4) UHD HDMI2 EDID data(2D, DTS, 3G) d. Model Name(Hex):
0 1 2 3 4 5 6 7 8 9 A B C D E F cf) TV set’s model name in EDID data is below.
00 00 FF FF FF FF FF FF 00 1E 6D a b Model name MODEL NAME(HEX)
01 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)
02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C e. Checksum: Changeable by total EDID data.
04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 1) AC3
05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A If HDMI UHD Deep Colour is “On” in Picture Menu,
06 3E 1E 53 10 00 0A 20 20 20 20 20 20 d HDMI has 6G checksum.
07 d 01 e
UHD
08 02 03 3C F1 54 10 9F 04 13 05 14 03 02 12 20 21 EDID C/S data
09 22 15 01 5D 5E 5F 62 63 64 29 3D 06 C0 15 07 50 HDMI
0A 09 57 07 f Block 0 A0 (HDMI1, 6G)
0B f E3 05 C0 00 E5 0E 60 61 65 66 01 1D 80 18 Block 1 D0 (HDMI1, 6G)
0C 71 1C 16 20 58 2C 25 00 40 84 63 00 00 9E 01 1D
Block 0 E6 (HDMI1, 3G) → Default
0D 00 72 51 D0 1E 20 6E 28 55 00 40 84 63 00 00 1E
0E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Check sum Block 1 7A (HDMI1, 3G) → Default
0F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e (Hex) Block 0 A0 (HDMI2, 6G)
Block 1 C0 (HDMI2, 6G)
(5) UHD HDMI1 EDID data(2D, PCM, 6G)
Block 0 E6(HDMI12 3G) → Default
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D a b Block 1 6A(HDMI12 3G) → Default
01 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 2) DTS
02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 If HDMI UHD Deep Colour is “On” in Picture Menu,
03 01 01 01 01 01 01 08 E8 00 30 F2 70 5A 80 B0 58 HDMI has 6G checksum.
04 8A 00 40 84 63 00 00 1E 02 3A 80 18 71 38 2D 40
UHD
05 58 2C 45 00 40 84 63 00 00 1E 00 00 00 FD 00 3A EDID C/S data
06 3E 1E 88 3C 00 0A 20 20 20 20 20 20 d HDMI
07 d 01 e Block 0 A0 (HDMI1, 6G)
08 02 03 41 F1 58 10 9F 04 13 05 14 03 02 12 20 21 Block 1 C7 (HDMI1, 6G)
09 22 15 01 60 61 5D 5E 5F 65 66 62 63 64 23 09 57
Block 0 E6 (HDMI1, 3G) → Default
0A 07 f
0B 67 D8 5D C4 01 78 80 03 E3 05 C0 00 E4 0F 00 C0 Check sum Block 1 71 (HDMI1, 3G) → Default
0C 18 66 21 50 B0 51 00 1B 30 40 70 36 00 40 84 63 (Hex) Block 0 A0(HDMI2, 6G)
0D 00 00 1E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 40 Block 1 B7 (HDMI2, 6G)
0E 84 63 00 00 1E 00 00 00 00 00 00 00 00 00 00 00 Block 0 E6 (HDMI2, 3G) → Default
0F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e
Block 1 61 (HDMI2, 3G) → Default
(6) UHD HDMI2 EDID data(2D, PCM, 3G) 3) PCM
0 1 2 3 4 5 6 7 8 9 A B C D E F If HDMI UHD Deep Colour is “On” in Picture Menu,
00 00 FF FF FF FF FF FF 00 1E 6D a b HDMI has 6G checksum.
01 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26 UHD
02 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80 EDID C/S data
03 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
HDMI
04 45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30 Block 0 A0 (HDMI1, 6G)
05 40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A Block 1 42 (HDMI2, 6G)
06 3E 1E 53 10 00 0A 20 20 20 20 20 20 d Block 0 E6 (HDMI1, 3G) → Default
07 d 01 e
08 02 03 36 F1 54 10 9F 04 13 05 14 03 02 12 20 21
Check sum Block 1 EC (HDMI2, 3G) → Default
09 22 15 01 5D 5E 5F 62 63 64 23 09 57 07 f (Hex) Block 0 A0 (HDMI1, 6G)
0A f E3 05 C0 00 Block 1 32 (HDMI2, 6G)
0B E5 0E 60 61 65 66 01 1D 80 18 71 1C 16 20 58 2C Block 0 E6 (HDMI1, 3G) → Default
0C 25 00 40 84 63 00 00 9E 01 1D 00 72 51 D0 1E 20
Block 1 DC (HDMI2, 3G) → Default
0D 6E 28 55 00 40 84 63 00 00 1E 00 00 00 00 00 00
0E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e e. Vendor Specific
INPUT Model name(HEX)
■ Detail EDID Options are below
a. Product ID HDMI1 6E 03 0C 00 10 00 B8 3C 20 00 80 01 02 03 04
MODEL NAME HEX EDID Table DDC Function HDMI2 6E 03 0C 00 10 00 B8 3C 20 00 80 01 02 03 04
UHD Model 0001 01 00 Analog/Digital
b. Serial No: Controlled on production line.
c. Month, Year:
ex) Week : '01' -> '01'
Year : '2015' -> '19' fix
Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
3.4. Function Check 4. Total Assembly line process
- Check display and sound
■ Check Input and Signal items.
4.1. White Balance adjustment
▪ W/B Equipment condition
1) TV
CA210 : LED → CH14, Test signal: Inner pattern(80IRE)
2) AV (SCART / CVBS)
▪ Above 5 minutes H/run in the inner pattern. (“power on” key
3) COMPONENT (480i)
of adjust remote control)
4) HDMI
▪ If it is executed W/B adjustment in 2~3 minutes H/run, it is
* Display and Sound check is executed by Remote control.
adjusted by Target data.
Mode Temp Coordinate spec Target
Not to push the INSTOP key after completion if the function X = 0.271 (± 0.002) X = 0.278
Cool 13,000 K
inspection. Y = 0.270 (± 0.002) Y = 0.280
X = 0.286 (± 0.002) X = 0.293
Medium 9,300 K
Y = 0.289 (± 0.002) Y = 0.299
X = 0.313 (± 0.002) X = 0.320
Warm 6,500 K
Y = 0.329 (± 0.002) Y = 0.339
▪ Normal line(LGD/CMI, March ~ December for Gumi, Global)
Cool Medium Warm
Aging time
NetCast5 x y x y x y
(Min)
271 270 286 289 313 329
1 0-2 282 289 297 308 324 348
2 3-5 281 287 296 306 323 346
3 6-9 279 284 294 303 321 343
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
▪ Normal line(LGD/CMI, January ~ February for Gumi, Apply
not Cinema Screen)
Cool Medium Warm
Aging time
NetCast5 x y x y x y
(Min)
271 270 286 289 313 329
1 0-2 286 295 301 314 328 354
2 3-5 284 290 299 309 326 349
3 6-9 282 287 297 306 324 346
4 10-19 279 283 294 302 321 342
5 20-35 276 278 291 297 318 337
6 36-49 274 275 289 294 316 334
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
▪ Aging chamber(LGD/CMI)
Cool Medium Warm
Aging time
NetCase5 X y x y x y
(Min)
271 270 285 293 313 329
1 0-5 280 285 294 308 319 340
2 6-10 276 280 290 303 315 335
3 11-20 272 275 286 298 311 330
4 21-30 269 272 283 295 308 327
5 31-40 267 268 281 291 306 323
6 41-50 266 265 280 288 305 320
7 51-80 265 263 279 286 304 318
8 81-119 264 261 278 284 303 316
9 Over 120 264 260 278 283 303 315
Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
▪ Use only AUO/Sharp/CSOT(Cool temp Spec is 13000 K) * Manual W/B process using adjust Remote control.
Cool Medium Warm ▪ After enter Service Mode by pushing "ADJ" key,
X y x y x y ▪ E nter White Balance by pushing " ► " key at "9. White
spec 271 270 286 289 313 329 Balance".
EZ ADJUST
target 278 280 293 299 320 339
0. Tool Option1
Whit Balance
1. Tool Option2
2. Tool Option3 Color Temp. ◄ Cool ►
▪ W/B information 3. Tool Option4 R-Gain 172
G-Gain 172
Model information W/B information 4. Tool Option5
5. Tool Option6 B-Gain 192
Model Module Panel Backlight Type Using W/B table 6. Country Group R-Cut 64
7. Area Option G-Cut 64
All All All Direct LED O 8. ADC Calibration B-Cut 64
9. White Balance Test-Pattern ON
10. 10 Point WB Backlight 100
Reset To Set
* Connecting picture of the measuring instrument 11. Test Pattern
12 EDID D/L
(On Automatic control) 13. Sub B/C
Inside PATTERN is used when W/B is controlled. Connect to 14. Ext. Input Adjust
auto controller or push Adjustment R/C P-ONLY → Enter the
mode of White-Balance, the pattern will come out. * CASE Cool Mode
First adjust the coordinate far away from the target
value(x, y).B.
1) x, y > target
Full White Pattern CA-210
2) x, y < target
COLOR 3) x > target, y < target
ANALYZER
TYPE : CA-210 4) x < target, y > target
- Every 4 case have to fit y value by adjusting B Gain
and then fit x value by adjusting R-Gain.
RS-232C Communication - In this case, increasing/decreasing of B Gain and R
Gain can be adjusted.
* Auto-control interface and directions How to adjust
(1) Adjust in the place where the influx of light like floodlight 1) In case G gain more than 172
around is blocked. (illumination is less than 10 lux). Adjust R Gain and B Gain less than 192
(2) Adhere closely the Color analyzer(CA210) to the module 2) If the G gain value be adjusted down to 172
less than 10 cm distance, keep it with the surface of the One of the R/B Gain is 254
Module and Color analyzer's prove vertically(90° ± 2.5°). 3) If G Gain is 172 , More than one of R/B Gain is to be
(3) Aging time between 192~254
- After aging start, keep the power on (no suspension of
power supply) and heat-run over 5 minutes. * CASE Medium / Warm
- Using 'no signal' or 'POWER ONLY' or the others, check First adjust the coordinate far away from the target
the back light on. value(x, y).
1) x, y > target
▪ Auto adjustment Map(using RS-232C to USB cable) i) Decrease the R, G.
RS-232C COMMAND 2) x, y < target
[CMD ID DATA] i) First decrease the B gain,
Wb 00 00 White Balance Start ii) Decrease the one of the others.
Wb 00 ff White Balance End 3) x > target, y < target
RS-232C COMMAND CENTER i) First decrease B, so make y a little more than the target.
[CMD ID DATA] (DEFAULT) ii) Adjust x value by decreasing the R
MIN MAX
4) x < target, y > target
Cool Mid Warm Cool Mid Warm
i) First decrease B, so make x a little more than the target.
R Gain jg Ja jd 00 172 192 192 254 ii) Adjust x value by decreasing the G
G Gain jh Jb je 00 172 192 192 192
B Gain ji Jc jf 00 192 192 172 254 * After you finished all adjustments, Press "In-start" key and
compare Tool option and Area option value with its BOM, if
R Cut 64 64 64 128
it is correctly same then unplug the AC cable. If it is not
G Cut 64 64 64 128 same, then correct it same with BOM and unplug AC cable.
B Cut 64 64 64 128 For correct it to the model's module from factory Jig model.
* Push the "IN STOP" key after completing the function
inspection. And Mechanical Power Switch must be set
Color Temperature : COOL, Medium, Warm. “ON”.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.(When R/G/B Gain are all
C0, it is the FULL Dynamic Range of Module)
Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
4.2. IR emitter inspection 6. GND and HI-POT Test
(1) Start 3D pattern inspection.
(2) If IR emitter signal is correctly received to IR receiver, the
6.1. HI-POT auto-check preparation
- Check the POWER cable and SIGNAL cable insertion condition
lamp of IR tester turns on.
6.2. HI-POT auto-check
(1) Pallet moves in the station. (POWER CORD / AV CORD is
tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) HI-POT test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next
process automatically.
6.3. Checkpoint
(1) Test voltage
- Touchable Metal : 3 KV / min at 100 mA
- SIGNAL : 3 KV / min at 100 mA
(2) TEST time: 1 second. (case : mass production )
(3) TEST POINT
- Touchable Metal => LIVE & NEUTRAL : Touchable Metal.
- SIGNAL => LIVE & NEUTRAL : SIGNAL.
7. Model name & Serial number D/L
▪ Press "Power on" key of service remote control.
4.3. Outgoing condition Configuration (Baud rate : 115200 bps)
■ When pressing IN-STOP key by SVC remocon, Red LED
▪ Connect RS232 Signal Cable to USB Jack.
are blinked alternatively. And then automatically turn off. ▪ Write Serial number
(Must not AC power OFF during blinking) ▪ Must check the serial number at the Diagnostics of SET UP
menu(Refer to below).
5. Local Dimming Function Check
Step1) Turn on TV.
Step2) Press “P-only” key, enter to power only mode and
escape the “P-only” Mode by pressing “Exit” key
Step3) Press “Tilt” key, entrance to Local Dimming mode.
Step4) At the Local Dimming mode, module Edge Backlight
moving left to right Back light of module moving
Step5) confirm the Local Dimming mode
Step6) Press “Exit” key 7.1. Signal Table
CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 +...+ Data_n
Delay : 20ms
7.2. Command Set
Adjust mode CMD(hex) LENGTH(hex) Description
EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write : Model Name and Serial Number write in EEPROM,.
Copyright © LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
7.3. Method & notice 8. MAC Address & CI+ key download
(1) Serial number D/L is using of scan equipment.
(2) S etting of scan equipment operated by Manufacturing 8.1. MAC Address
Technology Group. 8.1.1. Equipment & Condition
(3) Serial number D/L must be conformed when it is produced in ▪ Play file : Serial.exe
production line, because serial number D/L is mandatory by ▪ MAC Address edit
D-book 4.0. ▪ Input Start / End MAC address
* Manual Download(Model Name and Serial Number) 8.1.2. Download method
If the TV set is downloaded by OTA or Service man, sometimes (1) Communication Prot connection
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "6.Model Number D/L" like below photo.
3) Input the Factory model name or Serial number like photo.
Connection: PCBA(USB Port) → USB to Serial Adapter(UC-
232A) → RS-232C cable → PC(RS-232C port)
* Caution: LJ21* chassis support only UC-232A driver. (only
use this one.)
(2) MAC Address & CI+ Key Download
▪ Set CI+ Key path Directory at Start Mac & CI+ Download
Programme
▪ Com 1,2,3,4 and 115200(Baudrate)
4) Check the model name Instart menu. → Factory name displayed.
(ex 47LB560V-ZA)
5) Check the Diagnostics.(DTV country only) → Buyer model
displayed.(ex 47LB560V-ZA)
GP4_LOW
▪ Port connection button click(1)
▪ Push the (2) MAC Address write.
▪ At success Download, check the OK (3)
▪ Start CI+ Key Download, Push the (4)
▪ Check the OK or NG
Copyright © LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
8.2. LAN Inspection
8.2.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
8.2.2. LAN inspection solution
▪ LAN Port connection with PCB
▪ Network setting at MENU Mode of TV
▪ Setting automatic IP
▪ Setting state confirmation
-> If automatic setting is finished, you confirm IP and MAC
Address.
8.3. LAN PORT INSPECTION(PING TEST)
Connect SET -> LAN port == PC -> LAN Port
SET PC
8.3.1. Equipment setting
(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
8.3.2. LAN PORT inspection (PING TEST)
(1) Play the LAN Port Test Program.
(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.
Copyright © LG Electronics. Inc. All rights reserved. - 17 - LGE Internal Use Only
Only for training and service purposes
Copyright ©
X-tal
CI Slot 24MHz
P_TS
Air/ P_TS
Cable
R TUNER
IF (+/-) T/C Demod
Only for training and service purposes
E (T2/C/A)
Analog Demod DDR3
A P_TS
R DVB-S P_TS 256MB
TUNER DEMOD
(H) (S2) (S2) CVBS
Nand Flash
(1Gb)
S SPI Flash
LNB SPI
LG Electronics. Inc. All rights reserved.
I OCP (1MB)
USB1(2.0) USB Boot
D 1.5A
E M1A
(V) HDMI System eeprom
I2C
Rx (256Kb)
H/P Audio Out
- 18 -
I2S Out MAIN Audio
AV/COMP CVBS/YPbPr I2C AMP(2ch)
SCART CVBS/RGB
IR/KEY IR / Key SUB
OPTIC SPDIF OUT LVDS ASSY
R
BLOCK DIAGRAM
(60Hz)
E
A
R HDMI1.4
(H)
HDMI Vx1
Tx
URSA11
DDR3
HDMI1(HDMI2.0)
HDMI embedded 1Gb
HDMI2(HDMI2.0) MUX
1Gb
DDR3 1Gb
120Hz only
1Gb
LGE Internal Use Only
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
911
910
400
521
120
900
540
901
LV1
121
530
820
401
500
902
800
Stand screw
A10
200
A2
Copyright © LG Electronics. Inc. All rights reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
L14 POWER BLOCK (POWER DETECT 2)
+24V +12V +3.5V_POWER_DET +3.5V_ST
R435
100K
Power_DET +12V
OPT OPT OPT
R457
8.2K
1%
R430
2.7K
1%
R432
0
5% RESET_IC_DIODES(MULTI)
OPT
R438
4.7K RESET_IC_KEC(MULTI)
IC401-*1
Upper 79"
PANEL_POWER TYP 6000mA
IC401 L408 L412
APX803E29 KIC7529M2
R454
VCC RESET 100 5%
3 2 POWER_DET VCC OUT MLB-201209-0120P-N2
3 2
C415 1
R431 C422 1 PANEL_VCC
0.1uF 1.2K GND
16V POWER_DET_RESET 0.1uF GND C425
1% PANEL_FET_AOS(MULTI)
0.1uF Q405
AO4447A
OPT 25V
+24V +3.5V_POWER_DET R436 S_1
1 8
D_4
100K
S_2 D_3
R445 C427 C438 2 7
OPT 10K 10uF 10uF S_3 D_2
OPT OPT 3 6
R451 R452 C439 C440
R427 R458 IC402 16V 16V
27K 0 APX803E29 OPT G
4 5
D_1 2K 2K 10uF 10uF
1% 5% R437 OPT OPT 16V 16V
VCC RESET 100 5%
3 2
R446
OPT OPT 1 PANEL_FET_ROHM(MULTI)
1.8K
C413 R428 GND
Q405-*1
RRH140P03TB
0.1uF 5.1K
16V 1% C S_1 1 8 D_4
R442
10K B Q403
Ready - Dual Power Det Power Detect activity
PANEL_CTL 2N3904S
S_2 2 7 D_3
NPN_KEC(MULTI) S_3 3 6 D_2
R417 E
G 4 5 D_1
Detect Valtage Now is Use Circuit Designator 10K
C
Power Detect +3.5V R432, R454-*1, R438 B Q403-*1
MMBT3904(NXP)
NPN_NXP(MULTI)
* Notice Power Detect +12V O R430, R431, R454 E
- Applying all inch models for LCD L14
- Dual Power Det is used Power Detect +24V R457, R454
for detecting two kinds of voltage
3.3V_FET_AOS(MULTI)
+3.3V_Normal Q406-*1
AO3435
+1.10V_VDDC
+3.5V_ST
S
D
IC403 +3.3V_NORMAL
+3.5V_ST
L406 TPS5432DDAR [EP]GND
+3.3V_NORMAL CB2012PK501T
G
C418
OPT 0.01uF
3.3V_FET_TOSHIBA(MULTI) C437 C436 C414 C435 BOOT SS R429
1 8
Q406 L410 0.1uF 10uF 10uF 0.1uF 10K
THERMAL
SSM3J332R BLM18PG121SN1D 16V 10V 10V 16V
+1.10V_VDDC VIN EN
9
Vout=1.25*(1+R2/R1)+Iadj*R2
D
+1.5V_DDR 2 7
S
L407 C417
3.6uH 0.1uF
C428 C429 C430 16V PH COMP
G
+3.3V_NORMAL R443 R447 3 6 C416
+1.5V_DDR
10K 22K 2.2uF
10V
0.1uF
16V
22uF
10V
ZD402
5V 3A 0.33uF
OPT R433 16V
ZD401 C424 C421 C420 GND VSENSE 2.7K
L409 IC404 L411 22uF 22uF 4 5
AZ1117EH-ADJTRG1 2.5V 0.1uF 1%
BLM18PG121SN1D CB2012PK501T 16V 10V 10V C419 C434
C423 R439
R448 0.039uF 390pF
50V 20K
IN OUT 2.2K R1 50V 50V
270pF 1%
ADJ/GND
C426 R449 R453 ZD403
1K R1 0 2.5V C C
10uF R444 R440
10V 1/16W POWER_ON/OFF_1 10K B Q404 B Q404-*1 47K
R2
1% C431 2N3904S MMBT3904(NXP) 1%
10uF
1.3A R450
200 R2
10V
E
NPN_KEC(MULTI)
E
NPN_NXP(MULTI)
1/16W
1%
Vout=0.808*(1+R1/R2)
+12V
+5V_Normal FROM LIPS or POWER B/D
+5V_NORMAL
L404 Q401-*1
PNP_NXP(MULTI)
BLM18PG121SN1D +3.3V_NORMAL MMBT3906(NXP)
POWER_28P
1 3
C403 C404 PWR ON 1 2 DRV ON
2
10uF 0.1uF PDIM1 3 4 PDIM2
16V 3.5V GND
IC405 +3.5V_ST 5 6
R415 3.5V 3.5V
BD9D321EFJ [EP] Q401 7 8
10K PNP_KEC(MULTI) GND GND
C Q400-*1 9 10
PWM_DIM
2N3906S-RTK
MMBT3904(NXP) 12V 11 12 12V
EN VIN B
1 8 NPN_NXP(MULTI) 12V 13 14 12V
1 3
16V 12V GND
THERMAL
0.1uF 15 16
E
R408 R409 FB BOOT C411 R406 2 GND 17 18 24V
OPT
9
2 7 10K
R412 24V 19 20 24V
R1 120K 6.8K L405 +3.5V_ST 33K
1% 1% R404 24V 21 22 GND
VREG SW 3.6uH 4.7K
3 6 POWER_28P GND 23 24 NC C
C405 OPT URSA_L/D_CKR407 33 SCLK GND
100pF LPH6050T-3R6N-R R400 25 26 B
50V 10K C Q400 SIN V_SYNC 33 R413
SS GND C412 R402 27 28 URSA_L/D_VSYNC
R410
4
3A 5
22uF
10V
C443
22uF
10V RL_ON
10K B 2N3904S
NPN_KEC(MULTI)
R424
URSA_L/D_DI R411 33
POWER_28P POWER_28P
C441 +3.3V_NORMAL
E
Q402-*1
C408 C432 29 18pF MMBT3904(NXP)
22K C409 C410 R401 R455 3.9K 18pF 18pF
E OPT OPT OPT NPN_NXP(MULTI)
.
1uF 2200pF 10K 0 P402 +3.5V_ST
1% 10V 50V R420
OPT 1K
R456
R2 0 R419
100 R426
ZD404-*1
ZD404 10K
C
+3.5V_POWER_DET 5V R425
TVS_SEMTECH(MULTI) POWER_24P B 10K
TVS_KEC(MULTI) INV_CTL
L400
CB2012PK501T E Q402
+3.5V_ST PWR ON 1 2 DRV ON 2N3904S NPN_KEC(MULTI)
ZD400-*1 PDIM1 PDIM2 R423
C407 C400 L401 3 4 PWM1
10uF 1uF ZD400 CB2012PK501T 3.5V GND
10V 10V 5 6 100
5V 3.5V 3.5V
TVS_KEC(MULTI) 2012 1005 TVS_SEMTECH(MULTI) 7 8
OPT GND GND OPT
+5V_USB L403 9 10
+3.3V_NORMAL +5V_NORMAL MLB-201209-0120P-N2 12V 12V R467
+12V 11 12 1K
C433 C402 12V 13 14 12V
IC406 4.7uF 0.1uF 12V 15 16 GND
BD2242G 16V 16V
GND 17 18 24V
3216 L402
MLB-201209-0120P-N2 24V 24V
+24V 19 20
R405 VIN VOUT 24V GND
4.7K 1 6 C401 21 22
C442 GND NC
4.7uF 0.1uF 23 24
C406 GND ILIM 50V 50V
0.1uF 2 5 R470
3216 0
16V 25
14K
1%
R418
EN OC
USB1_OCD 3 4 P401
1458mA
USB1_CTL
R403
10K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power_PD2 04
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
USB 3216 CAP(SIDE)
+5V_USB
JK700
ZD700 C703
SD05 C700
3AU04S-305-ZC-(LG)
10uF 10uF
1
5V
OPT 10V 10V
USB DOWN STREAM
OPT
2
SIDE_USB1_DM
R700
2.2
3
SIDE_USB1_DP
OPT OPT R701
C701 C702 2.2
5pF 5pF
4
50V 50V
5
OPT
D700
RCLAMP0502BA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_S1 07
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
SPDIF
SPDIF OPTIC JACK
+3.3V_NORMAL
5.15 Mstar Circuit Application
SPDIF_OPTIC
JK1001
JST1223-001
GND
1
Fiber Optic
VCC
2
VINPUT
3
SPDIF_OUT
4
C1001 C1002
FIX_POLE
OPT 1uF 18pF
10V 50V
SPDIF_OPTIC
ESD Ready
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SPDIF 10
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
+1.5V_DDR +1.5V_DDR Option : Ripple Check !!!
R12011K1%
R1205 1K 1% R1204 1K 1%
DDR_EXT
DDR_EXT
+1.5V_DDR +1.5V_DDR
C1202 1000pF
A-MVREFDQ A-MVREFCA
1K1%
C1201 0.1uF
C1213 0.1uF
C12141000pF
DDR_EXT
DDR_EXT
DDR_EXT
DDR_EXT
DDR_EXT
DDR_EXT
C1221
C1222
C1223
0.1uF
C1224
1uF
1uF
1uF
R1202
OPT OPT OPT OPT
CLose to DDR3 CLose to Saturn7M IC
DDR_1600_1G_HYNIX
IC1201 M1A_256M_UO4 M1A_128M_UO4 M1A_256M_UO7_AVS+ M1A_128M_UO7_AVS+
H5TQ1G63EFR-PBC IC101 IC101-*1 IC101-*2 IC101-*3
LGE2134(256M) LGE2133(128M) LGE2136(256M) LGE2135(128M)
EAN61829003
M8 N3
A-MVREFCA VREFCA A0 A-MA0
P7
A1 A-MA1 E11 E11 E11 E11
P3 A-MA0 B_DDR3_A[0] B_DDR3_A[0] B_DDR3_A[0] B_DDR3_A[0]
DDR_1600_1G_SS DDR_1600_2G_HYNIX_OLD DDR_1600_2G_HYNIX_NEW DDR_1600_2G_SS A2 A-MA2 F12 F12 F12 F12
H1 N2 A-MA1 B_DDR3_A[1] B_DDR3_A[1] B_DDR3_A[1] B_DDR3_A[1]
IC1201-*1 IC1201-*2 IC1201-*3 IC1201-*4 A-MVREFDQ VREFDQ A3 A-MA3 D10 D10 D10 D10
P8 A-MA2 B_DDR3_A[2] B_DDR3_A[2] B_DDR3_A[2] B_DDR3_A[2]
K4B1G1646G-BCK0 H5TQ2G63DFR-PBC H5TQ2G63FFR-PBC K4B2G1646Q-BCK0 A4 A-MA4 B10 B10 B10 B10
EAN61836301 EAN61829203 EAN61829204 EAN61848803 DDR_EXT P2 A-MA3 B_DDR3_A[3] B_DDR3_A[3] B_DDR3_A[3] B_DDR3_A[3]
R1203 A5 A-MA5 E15 E15 E15 E15
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 L8 R8 A-MA4 B_DDR3_A[4] B_DDR3_A[4] B_DDR3_A[4] B_DDR3_A[4]
P7
A1
P7
A1
P7
A1
P7
A1 ZQ A6 A-MA6 B11 B11 B11 B11
P3
A2
P3
A2
P3
A2
P3
A2 240 R2 A-MA5 B_DDR3_A[5] B_DDR3_A[5] B_DDR3_A[5] B_DDR3_A[5]
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 +1.5V_DDR A7 A-MA7 F14 F14 F14 F14
P8
A4
P8
A4
P8
A4
P8
A4 1% T8 A-MA6 B_DDR3_A[6] B_DDR3_A[6] B_DDR3_A[6] B_DDR3_A[6]
P2
A5
P2
A5
P2
A5
P2
A5 A8 A-MA8 C11 C11 C11 C11
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 B2 R3 A-MA7 B_DDR3_A[7] B_DDR3_A[7] B_DDR3_A[7] B_DDR3_A[7]
R2
A7
R2
A7
R2
A7
R2
A7 VDD_1 A9 A-MA9 D14 D14 D14 D14
DDR_EXT 10V C1203 D9 L7 A-MA8 B_DDR3_A[8] B_DDR3_A[8] B_DDR3_A[8] B_DDR3_A[8]
T8 T8 T8 T8
A8 A8 A8 A8 10uF A-MA10 A12 A12 A12 A12
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2
VDD_2 A10/AP
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9
DDR_EXT C1204 0.1uF G7 R7 A-MA9 B_DDR3_A[9] B_DDR3_A[9] B_DDR3_A[9] B_DDR3_A[9]
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7
VDD_3 A11 A-MA11 F16 F16 F16 F16
N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2
DDR_EXT C1205 0.1uF K2 N7 A-MA10 B_DDR3_A[10] B_DDR3_A[10] B_DDR3_A[10] B_DDR3_A[10]
T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8
VDD_4 A12/BC A-MA12 D13 D13 D13 D13
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
DDR_EXT C1206 0.1uF K8 T3 A-MA11 B_DDR3_A[11] B_DDR3_A[11] B_DDR3_A[11] B_DDR3_A[11]
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9
VDD_5 NC_7 A-MA13 D15 D15 D15 D15
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
DDR_EXT C1207 0.1uF N1 A-MA12 B_DDR3_A[12] B_DDR3_A[12] B_DDR3_A[12] B_DDR3_A[12]
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9
VDD_6 C12 C12 C12 C12
N8
BA1
N8
BA1
N8
BA1
N8
BA1 DDR_EXT C1208 0.1uF N9 M7 A-MA13 B_DDR3_A[13] B_DDR3_A[13] B_DDR3_A[13] B_DDR3_A[13]
M3
BA2
M3
BA2
M3
BA2
M3
BA2 VDD_7 NC_5 E13 E13 E13 E13
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
DDR_EXT C1209 0.1uF R1 A-MA14 B_DDR3_A[14] B_DDR3_A[14] B_DDR3_A[14] B_DDR3_A[14]
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8
VDD_8
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1
DDR_EXT C1210 0.1uF R9 M2
K9 C9 K9 C9 K9 C9 K9 C9
VDD_9 BA0 A-MBA0 A-MCK A9 A9 A9 A9
1%
DDR_EXT DDR_EXT
CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4
R1207
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
DDR_EXT C1211 0.1uF N8 A-MBA0 B_DDR3_BA[0] B_DDR3_BA[0] B_DDR3_BA[0] B_DDR3_BA[0]
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9
BA1 A-MBA1 D16 D16 D16 D16
K1 F1 K1 F1 K1 F1 K1 F1
C1212 0.1uF M3 A-MBA1 B_DDR3_BA[1] B_DDR3_BA[1] B_DDR3_BA[1] B_DDR3_BA[1]
56
J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 DDR_EXT BA2 A-MBA2 DDR_EXT A10 A10 A10 A10
RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 A1 C1215 A-MBA2 B_DDR3_BA[2] B_DDR3_BA[2] B_DDR3_BA[2] B_DDR3_BA[2]
L3
WE
L3
WE
L3
WE
L3
WE VDDQ_1
A8 J7
1%
J1 J1 J1 J1
R1208
NC_1 NC_1 NC_1 NC_1
T2
RESET NC_2
J9 T2
RESET NC_2
J9 T2
RESET NC_2
J9 T2
RESET NC_2
J9
VDDQ_2 CK 0.01uF C13 C13 C13 C13
NC_3
L1
NC_3
L1
NC_3
L1
NC_3
L1 C1 K7 50V A-MCK B_DDR3_MCLK B_DDR3_MCLK B_DDR3_MCLK B_DDR3_MCLK
B13 B13 B13 B13
56
NC_4
L9
NC_4
L9
NC_4
L9
NC_4
L9
VDDQ_3 CK
F3
DQSL NC_6
T7 F3
DQSL NC_6
T7 F3
DQSL NC_6
T7 F3
DQSL NC_6
T7 C9 K9 A-MCKB B_DDR3_MCLKZ B_DDR3_MCLKZ B_DDR3_MCLKZ B_DDR3_MCLKZ
G3
DQSL
G3
DQSL
G3
DQSL
G3
DQSL VDDQ_4 CKE A-MCKE E17 E17 E17 E17
D2 A-MCKE B_DDR3_MCLKE B_DDR3_MCLKE B_DDR3_MCLKE B_DDR3_MCLKE
C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9
VDDQ_5 A-MCKB
B7
DQSU VSS_2
B3 B7
DQSU VSS_2
B3 B7
DQSU VSS_2
B3 B7
DQSU VSS_2
B3 E9 L2
VSS_3
E1
VSS_3
E1
VSS_3
E1
VSS_3
E1
VDDQ_6 CS A/B_DDR3_CS B8 B8 B8 B8
E7
DML VSS_4
G8 E7
DML VSS_4
G8 E7
DML VSS_4
G8 E7
DML VSS_4
G8 F1 K1 A-MODT B_DDR3_ODT B_DDR3_ODT B_DDR3_ODT B_DDR3_ODT
D3
DMU VSS_5
J2 D3
DMU VSS_5
J2 D3
DMU VSS_5
J2 D3
DMU VSS_5
J2
VDDQ_7 ODT A-MODT C8 C8 C8 C8
VSS_6
J8
VSS_6
J8
VSS_6
J8
VSS_6
J8 H2 J3 A-MRASB B_DDR3_RASZ B_DDR3_RASZ B_DDR3_RASZ B_DDR3_RASZ
E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1
VDDQ_8 RAS A-MRASB +1.5V_DDR B9 B9 B9 B9
F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 H9 K3 A-MCASB B_DDR3_CASZ B_DDR3_CASZ B_DDR3_CASZ B_DDR3_CASZ
F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1
VDDQ_9 CAS A-MCASB DDR_EXT D11 D11 D11 D11
L3 A-MWEB
A-MDQSU
A-MDQSL
F8 P9 F8 P9 F8 P9 F8 P9
B_DDR3_WEZ B_DDR3_WEZ B_DDR3_WEZ B_DDR3_WEZ
A-MWEB R1206
DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10
H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1
WE
H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 J1
G2
DQL6
G2
DQL6
G2
DQL6
G2
DQL6 NC_1 10K F10 F10 F10 F10
H7 H7 H7 H7 J9 T2 A-MRESETB B_RESET B_RESET B_RESET B_RESET
A-MDQSUB
A-MDQSLB
DQL7 DQL7 DQL7 DQL7
VSSQ_1
B1
VSSQ_1
B1
VSSQ_1
B1
VSSQ_1
B1
NC_2 RESET A-MRESETB
D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 L1
C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1
NC_3 D12 D12 D12 D12
C8
DQU2 VSSQ_4
D8 C8
DQU2 VSSQ_4
D8 C8
DQU2 VSSQ_4
D8 C8
DQU2 VSSQ_4
D8 L9 A/B_DDR3_CS B_DDR3_CS0 B_DDR3_CS0 B_DDR3_CS0 B_DDR3_CS0
C2 E2 C2 E2 C2 E2 C2 E2
DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 NC_4
A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 T7 F3
A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A-MA14 NC_6 DQSL A-MDQSL A19 A19 A19 A19
B8
DQU6 VSSQ_8
G1 B8
DQU6 VSSQ_8
G1 B8
DQU6 VSSQ_8
G1 B8
DQU6 VSSQ_8
G1 G3 B_DDR3_DQSL B_DDR3_DQSL B_DDR3_DQSL B_DDR3_DQSL
A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9
DQSL A-MDQSLB B18 B18 B18 B18
B_DDR3_DQSU B_DDR3_DQSU B_DDR3_DQSU B_DDR3_DQSU
A9 C7
VSS_1 DQSU A-MDQSU C16 C16 C16 C16
B3 B7 A-MDML B_DDR3_DQML B_DDR3_DQML B_DDR3_DQML B_DDR3_DQML
VSS_2 DQSU A-MDQSUB D21 D21 D21 D21
E1 A-MDMU B_DDR3_DQMU B_DDR3_DQMU B_DDR3_DQMU B_DDR3_DQMU
VSS_3
G8 E7
VSS_4 DML A-MDML C18 C18 C18 C18
J2 D3 B_DDR3_DQSBL B_DDR3_DQSBL B_DDR3_DQSBL B_DDR3_DQSBL
VSS_5 DMU A-MDMU C17 C17 C17 C17
J8 B_DDR3_DQSBU B_DDR3_DQSBU B_DDR3_DQSBU B_DDR3_DQSBU
VSS_6
M1 E3
VSS_7 DQL0 A-MDQL0 A20 A20 A20 A20
M9 F7 A-MDQL0 B_DDR3_DQL[0] B_DDR3_DQL[0] B_DDR3_DQL[0] B_DDR3_DQL[0]
VSS_8 DQL1 A-MDQL1 A16 A16 A16 A16
P1 F2 A-MDQL1 B_DDR3_DQL[1] B_DDR3_DQL[1] B_DDR3_DQL[1] B_DDR3_DQL[1]
VSS_9 DQL2 A-MDQL2 C19 C19 C19 C19
P9 F8 A-MDQL2 B_DDR3_DQL[2] B_DDR3_DQL[2] B_DDR3_DQL[2] B_DDR3_DQL[2]
VSS_10 DQL3 A-MDQL3 C15 C15 C15 C15
T1 H3 A-MDQL3 B_DDR3_DQL[3] B_DDR3_DQL[3] B_DDR3_DQL[3] B_DDR3_DQL[3]
VSS_11 DQL4 A-MDQL4 C20 C20 C20 C20
T9 H8 A-MDQL4 B_DDR3_DQL[4] B_DDR3_DQL[4] B_DDR3_DQL[4] B_DDR3_DQL[4]
VSS_12 DQL5 A-MDQL5 C14 C14 C14 C14
G2 A-MDQL5 B_DDR3_DQL[5] B_DDR3_DQL[5] B_DDR3_DQL[5] B_DDR3_DQL[5]
DQL6 A-MDQL6 B21 B21 B21 B21
H7 A-MDQL6 B_DDR3_DQL[6] B_DDR3_DQL[6] B_DDR3_DQL[6] B_DDR3_DQL[6]
DQL7 A-MDQL7 B15 B15 B15 B15
B1 A-MDQL7 B_DDR3_DQL[7] B_DDR3_DQL[7] B_DDR3_DQL[7] B_DDR3_DQL[7]
VSSQ_1 F18 F18 F18 F18
B9 D7 A-MDQU0 B_DDR3_DQU[0] B_DDR3_DQU[0] B_DDR3_DQU[0] B_DDR3_DQU[0]
VSSQ_2 DQU0 A-MDQU0 D19 D19 D19 D19
D1 C3 A-MDQU1 B_DDR3_DQU[1] B_DDR3_DQU[1] B_DDR3_DQU[1] B_DDR3_DQU[1]
VSSQ_3 DQU1 A-MDQU1 D17 D17 D17 D17
D8 C8 A-MDQU2 B_DDR3_DQU[2] B_DDR3_DQU[2] B_DDR3_DQU[2] B_DDR3_DQU[2]
VSSQ_4 DQU2 A-MDQU2 E21 E21 E21 E21
E2 C2 A-MDQU3 B_DDR3_DQU[3] B_DDR3_DQU[3] B_DDR3_DQU[3] B_DDR3_DQU[3]
VSSQ_5 DQU3 A-MDQU3 E19 E19 E19 E19
E8 A7 A-MDQU4 B_DDR3_DQU[4] B_DDR3_DQU[4] B_DDR3_DQU[4] B_DDR3_DQU[4]
VSSQ_6 DQU4 A-MDQU4 D20 D20 D20 D20
F9 A2 A-MDQU5 B_DDR3_DQU[5] B_DDR3_DQU[5] B_DDR3_DQU[5] B_DDR3_DQU[5]
VSSQ_7 DQU5 A-MDQU5 D18 D18 D18 D18
G1 B8 A-MDQU6 B_DDR3_DQU[6] B_DDR3_DQU[6] B_DDR3_DQU[6] B_DDR3_DQU[6]
VSSQ_8 DQU6 A-MDQU6 F20 F20 F20 F20
G9 A3 A-MDQU7 B_DDR3_DQU[7] B_DDR3_DQU[7] B_DDR3_DQU[7] B_DDR3_DQU[7]
VSSQ_9 DQU7 A-MDQU7
R1209
E9 E9 E9 E9
ZQ ZQ ZQ ZQ
240
1%
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 1_DDR 12
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Serial Flash for SPI boot
+3.5V_ST +3.5V_ST
SPI_FLASH_MACRONIX
OPT IC1300
R1301
+3.5V_ST 4.7K MX25L8006EM2I-12G
C1300
CS# VCC 0.1uF
/SPI_CS 1 8
OPT
R1300 R1303
10K SO/SIO1 HOLD# 0
SPI_SDO 2 7
WP# SCLK
/FLASH_WP 3 6 SPI_SCK
R1302
GND SI/SIO0 33
4 5 SPI_SDI
SPI_FLASH_WINBOND SPI_FLAHS_WINBOND_NEW SPI_FHASH_MACRONIX_NEW
IC1300-*1 IC1300-*2 IC1300-*3
W25Q80BVSSIG W25Q80DVSSIG MX25L8035EM2I-10G
CS VCC CS VCC CS# VCC
1 8 1 8 1 8
DO[IO1] HOLD[IO3] DO[IO1] HOLD[IO3] SO/SIO1 NC/SIO3
2 7 2 7 2 7
%WP[IO2] CLK WP[IO2] CLK WP#/SIO2 SCLK
3 6 3 6 3 6
GND DI[IO0] GND DI[IO0] GND SI/SIO0
4 5 4 5 4 5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. S_FLASH 13
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
CI Region * Option name of this page : CI_SLOT
(because of Hong Kong)
CI SLOT
+5V_CI_ON
CI_DATA[0-7]
CI TS INPUT
CI_DATA[0-7]
+5V_NORMAL AR1903 33
C1903 FE_TS_DATA[7]
CI_MDI[7]
10uF FE_TS_DATA[6]
10V CI_MDI[6]
FE_TS_DATA[0-7]
R1908 FE_TS_DATA[5]
CI_MDI[5]
10K FE_TS_DATA[4]
CI_SLOT CI_MDI[4]
/CI_CD1 P1900
10125901-115LF
AR1904 33 FE_TS_DATA[3]
R1914 35 1 CI_MDI[3]
100 CI_DATA[3] FE_TS_DATA[2]
36 2 CI_MDI[2] FE_TS_DATA[1]
AR1900 CI_DATA[4]
CI_DATA[0-7]
33 37 3 CI_MDI[1] FE_TS_DATA[0]
CI_DATA[5] R1919
CI_TS_DATA[4] 38 4 10K CI_MDI[0]
CI_DATA[6]
CI_TS_DATA[5] 39 5
CI_DATA[7] FE_TS_DATA[0-7]
CI_TS_DATA[6] 40 6
R1917 R1921 33
CI_TS_DATA[7] 41 7 47 CI_MISTRT FE_TS_SYNC
CI_ADDR[10] /PCM_CE R1922 33
42 8 CI_MIVAL_ERR FE_TS_VAL_ERR
R1910 10K R1923 100
43 9 CI_OE CI_MCLKI FE_TS_CLK
CI_ADDR[11]
CI_IORD 44 10 +5V_NORMAL
CI_ADDR[9]
CI_IOWR 45 11
CI_ADDR[8]
46 12 R1920
CI_ADDR[13] 10K
CI_MDI[0] 47 13
CI_ADDR[14]
CI_MDI[1] 48 14
CI_MDI[2] 49 15 CI_WE
50 16 R1918 100
CI_MDI[3] /PCM_IRQA
51 17
GND
C1901
0.1uF
52
53
18
19
C1904
0.1uF
C1905
0.1uF
CI HOST I/F
CI_MDI[4] 16V
GND
CI_MDI[5] 54 20
+5V_NORMAL CI_ADDR[12]
CI_MDI[6] 55 21 CLOSE TO MSTAR
CI_ADDR[7]
R1900 56 22 GND
CI_MDI[7] CI_ADDR[6] CI_BUFFER_TOSHIBA(MULTI)
10K R1911 10K 57 23
CI_ADDR[5] IC1902
R1903 47 58 24 74LCX244FT
+3.3V_NORMAL
PCM_RST CI_ADDR[4]
R1904 47 CI_DET
/PCM_WAIT 59 25
CLOSE TO MSTAR CI_ADDR[3]
REG 60 26 C1906
R1905 100 CI_ADDR[2]
CI_TS_CLK 61 27 0.1uF
R1906 33 CI_ADDR[1] 1OE VCC 16V
CI_TS_VAL 62 28 1 20
R1907 33 CI_ADDR[0]
CI_TS_SYNC 63 29
CI_DATA[0]
64 30 1A1 2OE
AR1901 33 CI_DATA[1] 2 19
65 31 CI_ADDR[0-14] PCM_A[0]
CI_TS_DATA[0] CI_DATA[2] AR1902 AR1910
66 32 100
CI_TS_DATA[1] 2Y4 1Y1 100
67 33 3 18
CI_TS_DATA[2] CI_ADDR[7] CI_ADDR[0]
68 34
CI_TS_DATA[3] CI_ADDR[6] CI_ADDR[1]
G2 69 G1 CI_ADDR[5] 1A2 2A4 CI_ADDR[2]
PCM_A[1] 4 17 PCM_A[7]
R1912 CI_ADDR[4] CI_ADDR[3]
100
/CI_CD2 2Y3 1Y2
+5V_NORMAL GND 5 16
GND 1A3 2A3
PCM_A[2] 6 15 PCM_A[6]
C1900
2pF
R1909
50V 2Y2 1Y3
10K GND 7 14
CLOSE TO MSTAR
1A4 2A2
PCM_A[3] 8 13 PCM_A[5]
2Y1 1Y4
CI_MISTRT 9 12
CI_MIVAL_ERR
GND 2A1
10 11 PCM_A[4]
CI_MCLKI
CI_BUFFER_NXP(MULTI)
IC1902-*1
74LVC244APW
CI DETECT +3.3V_NORMAL
1OE
1 20
VCC
OR_GATE_CI_NXP(MULTI)
IC1900
74LVC1G32GW +3.3V_NORMAL 1A0 2OE
2 19
B 1 5 VCC
/CI_CD2
A 2
/CI_CD1 2Y0 1Y0
AR1905 33 3 18
GND 3 4 Y R1913 CI_DATA[0] PCM_D[0]
10K CI_DATA[1] PCM_D[1]
1A1 2A0
CI_DATA[0-7]
CI_DATA[2] PCM_D[2] 4 17
R1924 CI_DATA[3] PCM_D[3]
OR_GATE_CI_TOSHIBA(MULTI)
IC1900-*1
0
TOSHIBA ELECTRONICS KOREA CORPORATION CI_DET 2Y1 1Y1
5 16
PCM_D[0-7]
IN_B VCC
1 5
/PCM_CD AR1906 33
R1915 CI_DATA[4] PCM_D[4]
IN_A
2 47 CI_DATA[5] PCM_D[5] 1A2 2A1
6 15
GND OUT_Y
3 4 CI_DATA[6] PCM_D[6]
CI_DATA[7] PCM_D[7] 2Y2 1Y2
7 14
PCM_D[0-7] 1A3 2A2
8 13
CI_DATA[0-7]
CI POWER ENABLE CONTROL 2Y3
9 12
1Y3
GND 2A3
AR1908 33 10 11
CI_ADDR[8] PCM_A[8]
+5V_NORMAL IC1901 CI_ADDR[9] PCM_A[9]
AP2151WG-7 +5V_CI_ON CI_ADDR[10] PCM_A[10]
L1900 CI_ADDR[11] PCM_A[11]
BLM18PG121SN1D
IN OUT
5 1
GND AR1909 33
2 CI_ADDR[12] PCM_A[12]
R1916
C1902
100K CI_ADDR[13] PCM_A[13]
R1902 1uF
100 EN FLG 10V CI_ADDR[14] PCM_A[14]
PCM_5V_CTL 4 3
REG /PCM_REG
R1901
10K
AR1907 33
CI_OE /PCM_OE
CI_WE /PCM_WE
CI_IORD /PCM_IORD
CI_IOWR /PCM_IOWR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCI 19
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
ETHERNET
* H/W option : ETHERNET
JK2100
RJ45VT-01SN002
1
1
EPHY_TP
ETHERNET
2
2
3
3
EPHY_TN
4
4
EPHY_RP
5
5
6
6
EPHY_RN
7
7
8
8
9
9
ETHERNET ETHERNET
C2105 C2104
0.01uF 0.01uF
50V 50V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
LAN 21
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
DVB-S2 LNB Part Allegro
(Option:LNB)
Input trace widths should be sized to conduct at least 3A
Ouput trace widths should be sized to conduct at least 2A
3A
+12V_LNB
2A LNB_DIODE_SUZHOU(MILTI)
LNB_DIODE_SUZHOU(MULTI)
D2705-*1
40V
D2703-*1
SS2040LL-LG LNB
Max 1.3A
L2702
LPH6050T-150M-R
40V D2705 15uH
LNB_DIODE_ONSEMI(MULTI) LNB_DIODE_KEC(MULTI)
D2703 SMAB34 40V 3.5A
30V
LNB
C2708
LNB LNB LNB LNB 10uF
C2703 C2704 C2705 C2706 25V
0.01uF 10uF 10uF 10uF
50V 25V 25V 25V
close to Boost pin(#1)
A_GND A_GND
A_GND
LNB_DIODE_SUZHOU(MILTI)
D2702-*1 close to VIN pin(#15)
SS2040LL-LG
[EP]GND
LNB
LNB C2709
BOOST
GNDLX
NC_3
NC_2
40V C2707 0.1uF
50V
LX
0.1uF
20
19
18
17
16
LNB_DIODE_ONSEMI(MULTI)
D2702 VCP 1 15 VIN
close to TUNER MBR230LSFT1G
LNB
THERMAL
GND
LNB_OUT 2 21 14
LNB
30V NC_1 VREG R2703
3 13 36K
LNB
SMAB34
LNB LNB LNB TDI ISET 1/16W 1%
R2702 C2712 LNB_DIODE_KEC(MULTI) 4 IC2701 12
LNB LNB LNB LNB C2713
TDO A8303SESTR-T(4M)TCAP
2.2K 0.22uF 0.1uF D2704
C2714 C2701 C2702 D2701 1W 25V 5 11
50V 40V
18pF 18pF 33pF
10
LNB_DIODE_SUZHOU(MULTI) LNB
6
7
8
9
C2710
D2704-*1 0.1uF
IRQ
SCL
SDA
ADD
TONECTRL
40V LNB
C2711
Close to Tuner 0.22uF
Surge protectioin
A_GND A_GND
R2706
0
LNB LNB
R2704 R2705
33 33
Caution!! need isolated GND
R2701
0
DEMOD_SCL
DEMOD_SDA
LNB_TX
A_GND
Max 1.3A
+12V +12V_LNB
LNB
L2701
BLM18PG121SN1D
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
LNB 27
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
SCART_COMPONENT
COMPONENT SCART AMP
+12V
JK2802
PPJ245N2-01
R2811 EU
6E [RD2]E-LUG 10K C2808
COMP2_R_IN
VA2804 R2803 330pF R2816 0.1uF
470K C2802 12K IC2801 50V
5E [RD2]O-SPRING 5.6V AZ4580MTR-E1
ESD_COMP
R2810 EU
4E [RD2]CONTACT 10K R2831
COMP2_L_IN +3.3V_NORMAL 2.2K OUT1 8 VCC
330pF R2815 DTV/MNT_L_OUT 1
[WH]O-SPRING
VA2803 R2802
470K C2803 12K EU
EU EU
5D 5.6V EU R2834 R2844
ESD_COMP C2804 OPT IN1- OUT2
10uF 33K 7 2.2K
R2817 R2818 R2832 2
[RD1]CONTACT 10K 1K 16V DTV/MNT_R_OUT
4C 470K EU
COMP2_DET R2841 EU
EU IN1+ IN2- 33K C2812
[RD1]O-SPRING VA2816 3 6 OPT 10uF
5C EU R2836
5.6V C2807 10K EU R2843 16V
33pF 470K
ESD_COMP R2839
7C [RD1]E-LUG-S VEE 5 IN2+ 10K
4 EU
COMP2_Pr+ C2810
[BL]O-SPRING ZD2806 VA2802 R2801 EU 33pF
5B
COMP_ZENER_KEC(MULTI) 5.5V 75 R2835
5.6K EU
[GN/YL]CONTACT ZD2807 OPT SCART1_Lout R2840
4A COMP_ZENER_KEC(MULTI) 5.6K
SCART1_Rout
330pF 220K
[GN/YL]O-SPRING C2806 R2833
5A EU EU EU
EU
R2842 C2811
220K 330pF
6A [GN/YL]E-LUG
COMP2_Pb+
VA2801 R2800
ZD2804 5.5V 75
COMP_ZENER_KEC(MULTI)
CLOSE TO MSTAR
OPT
ZD2806-*1
COMP_ZENER_ROHM(MULTI) ZD2805 +3.3V_NORMAL CLOSE TO MSTAR
COMP_ZENER_KEC(MULTI)
ZD2807-*1
COMP_ZENER_ROHM(MULTI)
R2812 R2814
ZD2804-*1 1K
COMP_ZENER_ROHM(MULTI) 10K
AV_CVBS_DET
VA2800 OPT
ZD2805-*1 5.6V C2800
COMP_ZENER_ROHM(MULTI) ESD_COMP 0.1uF
16V
ZD2802-*1
COMP_ZENER_ROHM(MULTI) COMP2_Y+/AV_CVBS_IN
R2804 R2859
ZD2803-*1 ZD2802 75 75
COMP_ZENER_ROHM(MULTI) COMP_ZENER_KEC(MULTI) 1608 3216
OPT
ZD2803
COMP_ZENER_KEC(MULTI)
SCART_MUTE_NPN_NXP(MULTI) SCART_MUTE_NPN_NXP(MULTI)
Q2802-*1 Q2803-*1
MMBT3904(NXP) MMBT3904(NXP)
+3.3V_NORMAL
FULL SCART [SCART AUDIO MUTE] +3.5V_ST
R2819
10K
DTV/MNT_L_OUT SCART_MUTE
R2820 1K R2837 SCART_MUTE
SC1/COMP1_DET 2K R2845
VA2815 EU SCART_MUTE_NPN_KEC(MULTI) 10K
5.6V R2850 1K Q2802
OPT AV2_CVBS_DET 2N3904S
AV2
SCART1_MUTE
SCART_MUTE
DTV/MNT_R_OUT R2838 SCART_MUTE
2K C2809
SC1/AV2_CVBS_IN SCART_MUTE_NPN_KEC(MULTI) 0.1uF
Q2803
ZD2800-*1 ZD2800 SCART/AV2 2N3904S
AV2
AV2_CVBS_ZENER_ROHM(MULTI) R2857 R2860 C2801
AV2_CVBS_ZENER_KEC(MULTI) 75 75 47pF
AV_DET ZD2801-*1 ZD2801 3216 50V
1608 OPT
VA2807 AV2_CVBS_ZENER_ROHM(MULTI) AV2_CVBS_ZENER_KEC(MULTI) 1%
22
COM_GND 5.5V
ESD_SCART
21
SYNC_IN EU
R2861 AV2
20
SYNC_OUT 10 JK2803
OPT OPT DTV/MNT_VOUT
19 PPJ231-02
SYNC_GND2 VA2808 VA2814-*1 EU C2815 C2816
VA2814 R2821
18 20V 5.6V ESD_SCART_INNOCHIPS(MULTI) 75 68pF 68pF 4
SYNC_GND1 ESD_SCART 50V 50V EU AV2_R_IN_A
ESD_SCART_AMOTECH(MULTI) R2827
17 22
RGB_IO 5
SC1_FB AV2_L_IN_A
16
R_OUT R2847 100
SC1_R+/COMP1_Pr+ 7
15 AV2_CVBS_DET
RGB_GND ESD_SCART AV2
VA2810 R2807 VA2820
14 75 EU 8
R_GND 20V 5.6V
R2822 OPT
13 75
D2B_OUT 6 R2848
0
12 EU
G_OUT
11 SC1_G+/COMP1_Y+
D2B_IN VA2811 R2808
10 20V 75
G_GND ESD_SCART EU
9 R2824
ID 15K
SC1_ID SC1/AV2_CVBS_IN
8
B_OUT EU
7 SC1_B+/COMP1_Pb+ R2828
AUDIO_L_IN VA2812 VA2817
20V 3.9K
20V R2805
6 75 ESD_SCART
B_GND ESD_SCART
5
AUDIO_GND
SCART/AV2
4
AUDIO_L_OUT R2826
10K
3 SC1/COMP1_L_IN
SCART/AV2
AUDIO_R_IN
SCART/AV2
2 R2806 R2829
AUDIO_R_OUT VA2813 470K C2818 12K
5.6V 1000pF
1 50V VA2813-*1
OPT AV2_L_IN
ESD_SCART/AV2_INNOCHIPS(MULTI) R2846
ESD_SCART/AV2_AMOTECH(MULTI) 0
AV2_L_IN_A AV2
EU SCART/AV2
JK2801 R2825
10K
PSC008-01
SCART/AV2
SC1/COMP1_R_IN
VA2809
SCART/AV2
5.6V C2817
R2809 1000pF VA2809-*1 R2830
470K 50V ESD_SCART/AV2_INNOCHIPS(MULTI) 12K
OPT AV2_R_IN
R2849
ESD_SCART/AV2_AMOTECH(MULTI) 0
AV2_R_IN_A AV2
EU
DTV/MNT_L_OUT
AV2
VA2806 C2813
5.6V 1000pF
OPT 50V
DTV/MNT_R_OUT
EU
VA2805 C2814
5.6V 1000pF
OPT 50V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SCART_ COMPONENT 28
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Headphone
RS-232C Control INTERFACE
Close to the Main IC
HEAD_PHONE
L3000
5.6uH HEAD_PHONE
HP_LOUT
HEAD_PHONE C3000 OPT C
C3004 E
10uF C3002 HEAD_PHONE
4.7uF R3002 Q3002 B
16V 1000pF 1K Q3004
10V MMBT3904(NXP) MMBT3904(NXP) PHONE_JACK
50V B OPT
OPT JK3000
+3.5V_ST E +3.3V_NORMAL
C PEJ038-3B6
GND 5
E
OPT OPT HEAD_PHONE
Q3001 R3005
10K L 4
OPT MMBT3906(NXP)
C R3001 B
R3000 3.3K
1K B C DETECT 3
SIDE_HP_MUTE HP_DET
Q3000 R3004
MMBT3904(NXP) 1K
E HEAD_PHONE R 1
OPT
HEAD_PHONE
L3001 HEAD_PHONE
5.6uH
HP_ROUT
HEAD_PHONE C3001 OPT HEAD_PHONE
C E
C3005 10uF C3003 R3003 Q3003
4.7uF 16V 1000pF B Q3005
1K MMBT3904(NXP) MMBT3904(NXP)
10V 50V OPT B OPT
E C
Close to the Main IC
RS232C_PHONE
R3006
100
+3.5V_ST
RS232C_PHONE
R3007
100
C3006 OPT
0.33uF ZD3001 OPT
ADUC 20S 02 010L ZD3002
20V ADUC 20S 02 010L
RS232C_PHONE RS232C_PHONE 20V
RS232C_PHONE C3007
IC3001 0.1uF
MAX3232CDR
RS232C_PHONE C1+ VCC
1 16
C3008
0.1uF V+ GND
RS232C_PHONE 2 15
C3009
0.1uF C1- DOUT1
3 14
RS232C_PHONE C2+ RIN1
4 13
C3010 RS232C_PHONE
0.1uF C2- ROUT1 0 R3008
5 12
PM_RXD
RS232C_PHONE
RS232C_PHONE V- DIN1 0 R3009
6 11
PM_TXD
C3011
0.1uF DOUT2 DIN2
7 10
RIN2 ROUT2
8 9
EAN41348201
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HEAD_PHONE_EU 30
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
RS-232C 4PIN & MSTAR DEBUG 4PIN
RS-232C 4PIN
+3.5V_ST P4000
12507WS-04L
R4001
100 VCC
1
PM_TXD
R4000
100 PM_RXD
2
PM_RXD
GND
3
RM_TXD
4
5
GND
MSTAR DEBUG 4PIN
P4001
JP_GND1
JP_GND2
JP_GND3
JP_GND4
12507WS-04L
1
2
3 RGB_DDC_SCL
4 RGB_DDC_SDA
5
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_MSTAR_DEBUG_4P 40
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
TP for EU
HDMI_ARC HP_ROUT CI_DET EPHY_RP URSA_RESET
HP_LOUT /CI_CD1 EPHY_TN DEMOD_RESET
SIDE_HP_MUTE /CI_CD2 EPHY_TP
SPDIF_OUT HP_DET EPHY_RN
AV2_CVBS_DET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
TP_EU 41
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
IR/LED + Digital Eye + Control
+3.5V_ST
R4603 R4604
10K 10K
1% 1%
R4601
100 P4600 OPT
KEY1 P4601
12507WR-10L
C4602 12507WR-08L
0.1uF
16V
R4602 1
100 1
KEY2
C4603 2
0.1uF 2
+3.5V_ST 16V
3
L4600 3
BLM18PG121SN1D
4
4
R4606
+3.5V_ST C4600 C4601 1.8K
0.1uF 1000pF LED_R/BUZZ 5
16V 50V 5
VA4600
OPT
R4600 6
3.3K 6
IR 7
C4604 7
100pF ZD4601
50V 5V 8
OPT 8
9 9
10
EYE_SENSOR 11
C4605
18pF
50V
R4608 100
DDC2_DL_SCL
OPT
R4609 100
DDC2_DL_SDA
OPT EYE_SENSOR
C4606
R4605 100 18pF
IR_SCL
EYE_SENSOR 50V
R4607 100
IR_SDA
EYE_SENSOR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR_EYE_SENSOR 46
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
NAND FLASH MEMORY
IC102 (SPI_SDI, PM_LED, PWM_PM)
H27U1G8F2CTR-BC M1A_256M_UO4
LG-NonOS SB51_ExtSPI 3’b000 51boot from SPI
LG-OS HEMCU_ExtSPI 3’b001 MIPS boot from SPI IC101
+3.3V_NORMAL +3.3V_NORMAL +3.5V_ST
NC_1 NC_29 LGE2134(256M) M1A_128M_UO4
IC101-*1
1 48 LGE2133(128M)
NAND_1G_HYNIX(MULTI)
NC_2 NC_28
2 EAN35669103 47 U19 D5
LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35
NC_3 NC_27 PCM_A[0-7] U19 D5
T20
LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36
F8
4.7K
T21 E7
4.7K
2.7K
3 46 RXA4+ LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35 KEY1 LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37
22 T20 F8
T19
R21
LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38
E6
D6
NC_4 NC_26 RXA4- LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36 KEY2 LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39
OPT
OPT
R20
4 45 AR101 T21 E7 R19
LVACKM/TTL_B[5]/GCLK/GPIO175
W10
RXA3+ LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37 PM_MODEL_OPT_0 P20
LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20
Y10
NC_5 I/O7 PCM_A[7] T19 E6 LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21
R115
R117
R165
5 44 RXA3- +3.3V_NORMAL P3
LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38 PANEL_CTL P19
PM_LED/GPIO4
Y3
R21 D6 N20
LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7
Y5
NC_6 I/O6 PCM_A[6] RXACK+ LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39 SCART1_MUTE N21
LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17
W11
AR103 R107 6 43 R20 R123 N19
LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22
D3
22 R109 RXACK- LVACKM/TTL_B[5]/GCLK/GPIO175 10K M21
LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11
AA3
1K 3.9K R/B I/O5 PCM_A[5] LED_R/BUZZ R19 W10 OPT M20
LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14
W5
7 42 RXA2+ LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20 URSA_RESET_SoC M19
LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15
D4
P20 Y10 R122 22 L20
LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200
L15
/F_RB RE I/O4 PCM_A[4] PM_LED RXA2- LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21 TCON_I2C_EN LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
Y11
8 41 P3 L19
PM_UART_RX/GPIO_PM[5]/GPIO12
R124 10K
/PF_OE PM_LED/GPIO4 PM_LED K20
LVBCKP/TTL_R[0]/EPI4+/GPIO186
CE NC_25 SPI_SDI DIMMING P19 Y3 K21
LVBCKM/TTL_R[1]/EPI4-/GPIO187
/PF_CE0 9 40 RXA1+ LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7 POWER_DET K19
LVB2P/TTL_R[2]/EPI5+/GPIO188
4.7K
4.7K
2.7K
N20 Y5 J21
LVB2M/TTL_R[3]/EPI5-/GPIO189
NC_7 NC_24 RXA1- LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17 AMP_MUTE J20
LVB1P/TTL_R[4]/EPI6+/GPIO190
R108 10 39 C102 R157 100 N21 W11 J19
LVB1M/TTL_R[5]/EPI6-/GPIO191
10uF RXA0+
OPT
1K PWM_DIM PWM2 LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22 INV_CTL H20
LVB0P/TTL_R[6]/EPI7+/GPIO192
NC_8 NC_23 10V N19 D3 LVB0M/TTL_R[7]/EPI7-/GPIO193
OPT C101 11 38 RXA0- LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11 POWER_ON/OFF_1
R116
R118
R121
M21 AA3
0.1uF VCC_1 VCC_2 RXB4+
12 37 R156 OPT 10K M20
LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14
W5
RL_ON
DDC1_DL_SCL RXB4- LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15 /FLASH_WP
VSS_1 VSS_2 C103 R103 10K M19 D4 M1A_256M_UO7_AVS+ M1A_128M_UO7_AVS+
13 36 0.1uF DDC1_DL_SDA RXB3+ LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200 LED_R/BUZZ IC101-*2 IC101-*3
OPT L20 L15 LGE2136(256M) LGE2135(128M)
NC_9 NC_22 RXB3- LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8 PM_TXD
+3.3V_NORMAL 14 35 Y11
PM_UART_RX/GPIO_PM[5]/GPIO12 PM_RXD U19 D5 U19 D5
NC_10 NC_21 L19 T20
LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35
F8 T20
LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35
F8
R105 15 34 NVRAM_ATMEL(MULTI) RXBCK+ LVBCKP/TTL_R[0]/EPI4+/GPIO186 T21
LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36
E7 T21
LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36
E7
1K K20 T19
LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37
E6 T19
LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37
E6
OPT CLE NC_20 IC104 RXBCK- LVBCKM/TTL_R[1]/EPI4-/GPIO187 R21
LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38
D6 R21
LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38
D6
16 33 K21 LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39 LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39
AR104
22
AR102 AT24C256C-SSHL-T RXB2+ LVB2P/TTL_R[2]/EPI5+/GPIO188
R20
R19
LVACKM/TTL_B[5]/GCLK/GPIO175
W10
R20
R19
LVACKM/TTL_B[5]/GCLK/GPIO175
W10
ALE I/O3 PCM_A[3] +3.3V_NORMAL K19 P20
LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20
Y10 P20
LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20
Y10
/PF_CE1 17 32 RXB2- LVB2M/TTL_R[3]/EPI5-/GPIO189 LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21 LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21
EEPROM J21 P19
PM_LED/GPIO4
P3
Y3 P19
PM_LED/GPIO4
P3
Y3
PF_ALE WE I/O2 PCM_A[2] RXB1+ LVB1P/TTL_R[4]/EPI6+/GPIO190 N20
LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7
Y5 N20
LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7
Y5
18 31 A0 VCC J20 N21
LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17
W11 N21
LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17
W11
/PF_WE 1 8 RXB1- LVB1M/TTL_R[5]/EPI6-/GPIO191 N19
LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22
D3 N19
LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22
D3
WP I/O1 PCM_A[1] J19 M21
LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11
AA3 M21
LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11
AA3
/PF_WP 19 30 C105 RXB0+ LVB0P/TTL_R[6]/EPI7+/GPIO192 M20
LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14
W5 M20
LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14
W5
0.1uF H20 M19
LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15
D4 M19
LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15
D4
R102 R106 NC_11 I/O0 PCM_A[0] A1 WP RXB0- LVB0M/TTL_R[7]/EPI7-/GPIO193 L20
LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200
L15 L20
LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200
L15
3.3K 1K 20 29 2 7
LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
Y11
LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
Y11
PM_UART_RX/GPIO_PM[5]/GPIO12 PM_UART_RX/GPIO_PM[5]/GPIO12
NC_12 NC_19 22 L19
K20
LVBCKP/TTL_R[0]/EPI4+/GPIO186
L19
K20
LVBCKP/TTL_R[0]/EPI4+/GPIO186
21 28 K21
LVBCKM/TTL_R[1]/EPI4-/GPIO187
K21
LVBCKM/TTL_R[1]/EPI4-/GPIO187
NC_13 NC_18 A2
3
A0’h 6
SCL R111 22
K19
J21
LVB2P/TTL_R[2]/EPI5+/GPIO188
LVB2M/TTL_R[3]/EPI5-/GPIO189
K19
J21
LVB2P/TTL_R[2]/EPI5+/GPIO188
LVB2M/TTL_R[3]/EPI5-/GPIO189
22 27 I2C_SCL J20
LVB1P/TTL_R[4]/EPI6+/GPIO190
J20
LVB1P/TTL_R[4]/EPI6+/GPIO190
LVB1M/TTL_R[5]/EPI6-/GPIO191 LVB1M/TTL_R[5]/EPI6-/GPIO191
J19 J19
NC_14 NC_17 H20
LVB0P/TTL_R[6]/EPI7+/GPIO192
H20
LVB0P/TTL_R[6]/EPI7+/GPIO192
23 26 GND SDA
LVB0M/TTL_R[7]/EPI7-/GPIO193 LVB0M/TTL_R[7]/EPI7-/GPIO193
4 5 R112 22
NC_15 NC_16 I2C_SDA
24 25 C104 C106
8pF 8pF
OPT OPT
EAN61133501
NVRAM_RHOM(MULTI)
NAND_2G_HYNIX(MULTI) NAND_1G_TOSHIBA(MULTI)
IC104-*1
EAN60708703 EAN61508002
BR24G256FJ-3
IC102-*1 IC102-*2
H27U2G8F2DTR-BD TC58NVG0S3HTA00 M1A_256M_UO4
A0 VCC IC101
1 8 M1A_128M_UO4
LGE2134(256M) from CI SLOT IC101-*1
NC_1 NC_29 NC_1 NC_29 LGE2133(128M)
1 48 1 48
A1 WP
NC_2 NC_28 NC_2 NC_28 2 7 CI_TS_CLK Y1 V10
2 47 2 47 CI_TS_DATA[0-7] W4
GPIO78 TS0CLK/GPIO92
T14
GPIO79 TS0DATA[0]/GPIO82
NC_3 NC_27 NC_3 NC_27 Y1 V10 TS0DATA[1]/GPIO83
T13
3 46 3 46 A2 SCL FRC_FLASH_WP GPIO78 TS0CLK/GPIO92 CI_TS_DATA[0] CI_TS_SYNC K17
I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84
U13
3 6 W4 T14 J15
I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85
V15
NC_4 NC_26 NC_4 NC_26 5V_DET_HDMI_2 GPIO79 TS0DATA[0]/GPIO82 CI_TS_DATA[1] CI_TS_VAL U8
SDAM2/GPIO55 TS0DATA[4]/GPIO86
U12
4 45 4 45 T13 T7
SCKM2/GPIO56 TS0DATA[5]/GPIO87
V13
U7 U14
TS0DATA[1]/GPIO83 CI_TS_DATA[2] SCKM0/GPIO58 TS0DATA[6]/GPIO88
NC_5 I/O7 NC_5 I/O8 GND SDA R184 22 K17 U13 V7
SDAM0/GPIO59 TS0DATA[7]/GPIO89
T11
5 44 5 44 4 5 I2C_SCL I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84 CI_TS_DATA[3]
F6
I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91
T12
R183 22 J15 V15 G6
I2S_IN_SD/GPIO160 TS0VALID/GPIO90
V12
NC_6 I/O6 NC_6 I/O7 I2C_SDA I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85 CI_TS_DATA[4]
AA4
I2C_SCKM1/GPIO80 TS1CLK/GPIO103
Y14
6 43 6 43 R128 0 U8 U12 Y4
I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93
Y16
URSA_SDA SDAM2/GPIO55 TS0DATA[4]/GPIO86 CI_TS_DATA[5] TS1DATA[1]/GPIO94
AA15
R/B I/O5 RY/BY I/O6 R129 0 T7 V13 J6
ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95
Y13
7 42 7 42 URSA_SCL SCKM2/GPIO56 TS0DATA[5]/GPIO87 CI_TS_DATA[6]
K6
EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96
AA16
EAN62389502 R130 0 U7 U14 TS1DATA[4]/GPIO97
W12
RE I/O4 RE I/O5 DDC2_DL_SCL SCKM0/GPIO58 TS0DATA[6]/GPIO88 CI_TS_DATA[7]
G7 AA13
8 41 8 41 R131 0 V7 T11 Internal demod out I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
TS1DATA[6]/GPIO99
W14
DDC2_DL_SDA SDAM0/GPIO59 TS0DATA[7]/GPIO89 J4
ET_COL/GPIO60 TS1DATA[7]/GPIO100
W13
CE NC_25 CE NC_25 T2_OR_CHINA F6 T12 J5
ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
Y15
9 40 9 40 R113 22 AMP_SCL I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91 FE_TS_CLK TS1VALID/GPIO101
W15
DEMOD_SCL G6 V12 H19
LCK/GPIO194
R114 22 AMP_SDA I2S_IN_SD/GPIO160 TS0VALID/GPIO90 FE_TS_DATA[0-7] G20 B3
NC_7 NC_24 NC_7 NC_24 AA4 Y14
LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13
10 39 10 39 DEMOD_SDA G19
LHSYNC/GPIO196 PM_SPI_SCK/GPIO1
A3
T2_OR_CHINA TU_SCL I2C_SCKM1/GPIO80 TS1CLK/GPIO103 FE_TS_DATA[0] FE_TS_SYNC G21
LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0
A4
NC_8 NC_23 NC_8 NC_23 +3.3V_NORMAL Y4 Y16 PM_SPI_SDI/GPIO2
C3
11 38 11 38 I2C TU_SDA I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93 FE_TS_DATA[1] FE_TS_VAL_ERR J17
UART2_RX/GPIO69 PM_SPI_SDO/GPIO3
A2
AA15 J16
UART2_TX/GPIO70
E8 B1
VCC_1 VCC_2 VCC_1 VCC_2 TS1DATA[1]/GPIO94 FE_TS_DATA[2] UART3_TX/GPIO52 RP
12 37 12 37 J6 Y13 D7
UART3_RX/GPIO53 TN
C2
AV_CVBS_DET ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95 FE_TS_DATA[3]
U6
GPIO46[CTS] TP
C1
VSS_1 VSS_2 VSS_1 VSS_2 K6 AA16 V6
GPIO47[RTS] RN
B2
13 36 13 36 R101 R104 R110 R119 R120 R125 R140 R141 R144 R145 AV2_CVBS_DET EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96 FE_TS_DATA[4] FE_TS_DATA[0] K15
UART1_TX/GPIO48
1K 1K 1K 1K 1K 1K 1K 1K 2.2K 2.2K R146 R147 W12 L16
UART1_RX/GPIO49 SPDIF_IN/GPIO161
D2
TS1DATA[4]/GPIO97 FE_TS_DATA[0] D1
NC_9 NC_22 NC_9 NC_22 3.3K 3.3K G7 AA13 FE_TS_DATA[5] H5
SPDIF_OUT/GPIO162
14 35 14 35 ET_TX_EN/GPIO63
COMP2_DET I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98 FE_TS_DATA[6]
K5
ET_RXD[0]/GPIO65 HWRESET
D8
NC_10 NC_21 NC_10 NC_21 W14 K4
ET_MDC/GPIO66 IRIN/GPIO5
E5
H6 G4
15 34 15 34 TS1DATA[6]/GPIO99 FE_TS_DATA[7] ET_MDIO/GPIO67 DDCA_CK/UART0_RX
URSA_SDA J4 W13 L5
ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX
G5
CLE NC_20 CLE NC_20 URSA_SCL DEMOD_RESET ET_COL/GPIO60 TS1DATA[7]/GPIO100
16 33 16 33 J5 Y15 U17
PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71
J18
I2C_SDA MODEL_OPT_0 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102 R18
PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72
K18
ALE I/O3 ALE I/O4 W15 V17
PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73
K16
R16 L18
17 32 17 32 I2C_SCL TS1VALID/GPIO101 PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74
H19 U16
PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75
L17
WE I/O2 WE I/O3 AMP_SDA MODEL_OPT_1 LCK/GPIO194 T17
PCMADR[5]/NF_AD[5]/GPIO106
18 31 18 31 G20 B3 R189 33 W18
PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146
T8
AMP_SCL MODEL_OPT_2 LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13 /SPI_CS U20
PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142
T9
WP I/O1 WP I/O2 G19 A3 R188 33 Y19
PCMADR[8]/GPIO113 NF_CLE/GPIO141
U9
19 30 19 30 AMP_RESET LHSYNC/GPIO196 PM_SPI_SCK/GPIO1 SPI_SCK AA19
PCMADR[9]/GPIO115 NF_RBZ/GPIO147
U11
DDC1_DL_SDA G21 A4 AA20
PCMADR[10]/GPIO119 NF_REZ/GPIO144
V9
NC_11 I/O0 NC_11 I/O1 LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0 SIDE_HP_MUTE W21
PCMADR[11]/GPIO117 NF_WEZ/GPIO145
U10
20 29 20 29 DDC1_DL_SCL C3 V20
PCMADR[12]/GPIO109 NF_WPZ/GPIO199
T10
PM_SPI_SDI/GPIO2 SPI_SDI Y17
PCMADR[13]/GPIO112
NC_12 NC_19 NC_12 NC_19 DDC2_DL_SCL J17 A2 R190 33 V18
PCMADR[14]/GPIO111 IF_AGC
W2
21 28 21 28 HP_DET UART2_RX/GPIO69 PM_SPI_SDO/GPIO3 SPI_SDO V19
PCMCD_N/GPIO135 SIFM
W1
DDC2_DL_SDA J16 W19
PCMCE_N/GPIO120 SIFP
W3
NC_13 NC_18 NC_13 NC_18 SC1/COMP1_DET UART2_TX/GPIO70 U18
PCMDATA[0]/GPIO131 IM
V2
22 27 22 27 IR_SCL R126 0 E8 B1 V16
PCMDATA[1]/GPIO132 IP
V1
IR_SDA UART3_TX/GPIO52 RP EPHY_RP W17
PCMDATA[2]/GPIO133
NC_14 NC_17 NC_14 NC_17 IR_SDA D7 C2 Y20
PCMDATA[3]/GPIO125 XIN
AA2
23 26 23 26 UART3_RX/GPIO53 TN EPHY_TN R15
PCMDATA[4]/GPIO124 XOUT
Y2
U6 C1 AA18
PCMDATA[5]/GPIO123
NC_15 NC_16 NC_15 NC_16 MODEL_OPT_4 GPIO46[CTS] TP EPHY_TP T15
PCMDATA[6]/GPIO122
24 25 24 25 R127 0 V6 B2 Y21
PCMDATA[7]/GPIO121
IR_SCL GPIO47[RTS] RN EPHY_RN W20
PCMIORD_N/GPIO116
K15 V21
PCMIOWR_N/GPIO114
/CI_CD1 UART1_TX/GPIO48 Y18
PCMIRQA_N/GPIO110
L16 D2 T16
PCMOE_N/GPIO118
/CI_CD2 UART1_RX/GPIO49 SPDIF_IN/GPIO161 5V_DET_HDMI_1 R17
PCMREG_N/GPIO128
D1 R192 100 T18
PCM_RESET/GPIO134
+3.3V_NORMAL SPDIF_OUT/GPIO162 SPDIF_OUT W16
PCMWAIT_N/GPIO105
NAND_2G_TOSHIBA(MULTI) H5 SPDIF_OPTIC U15
PCMWE_N/GPIO198
USB1_CTL ET_TX_EN/GPIO63
EAN60991001 R180 K5 D8
IC102-*3 10K MODEL_OPT_5 ET_RXD[0]/GPIO65 HWRESET SOC_RESET
K4 E5
TC58NVG1S3ETA00 R197 0 MODEL_OPT_6 ET_MDC/GPIO66 IRIN/GPIO5 IR
CI_DET H6 G4 M1A_256M_UO7_AVS+ M1A_128M_UO7_AVS+
R178 22 USB1_OCD ET_MDIO/GPIO67 DDCA_CK/UART0_RX RGB_DDC_SCL IC101-*2 IC101-*3
/PCM_CD L5 G5 LGE2136(256M) LGE2135(128M)
PCM_A[0-14] ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX RGB_DDC_SDA
NC_1 NC_29
1 48 PCM_A[0] U17 J18 Y1 V10
Y1
GPIO78 TS0CLK/GPIO92
V10
GPIO78 TS0CLK/GPIO92 W4 T14
NC_2 NC_28 PCM_A[1] PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71 DDC1_DL_SCL W4
GPIO79 TS0DATA[0]/GPIO82
T14 GPIO79 TS0DATA[0]/GPIO82
T13
2 47 R18 K18 TS0DATA[1]/GPIO83
T13
K17
TS0DATA[1]/GPIO83
U13
PCM_A[2] PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72 PWM1 K17
I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84
U13
J15
I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84
V15
NC_3 NC_27 V17 K16 J15
I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85
V15
U8
I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85
U12
3 46 PCM_A[3] PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73 PWM2 U8
SDAM2/GPIO55 TS0DATA[4]/GPIO86
U12
T7
SDAM2/GPIO55 TS0DATA[4]/GPIO86
V13
R16 L18 T7
SCKM2/GPIO56 TS0DATA[5]/GPIO87
V13
U7
SCKM2/GPIO56 TS0DATA[5]/GPIO87
U14
NC_4 NC_26 PCM_A[4] PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74 DDC1_DL_SDA U7
SCKM0/GPIO58 TS0DATA[6]/GPIO88
U14
V7
SCKM0/GPIO58 TS0DATA[6]/GPIO88
T11
4 45 U16 L17 V7
SDAM0/GPIO59 TS0DATA[7]/GPIO89
T11
F6
SDAM0/GPIO59 TS0DATA[7]/GPIO89
T12
PCM_A[5] PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75 PCM_5V_CTL F6
I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91
T12
G6
I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91
V12
NC_5 I/O8 T17 G6
I2S_IN_SD/GPIO160 TS0VALID/GPIO90
V12
AA4
I2S_IN_SD/GPIO160 TS0VALID/GPIO90
Y14
5 44 PCM_A[6] PCMADR[5]/NF_AD[5]/GPIO106 AA4
I2C_SCKM1/GPIO80 TS1CLK/GPIO103
Y14
Y4
I2C_SCKM1/GPIO80 TS1CLK/GPIO103
Y16
W18 T8 +3.3V_NORMAL Y4
I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93
Y16 I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93
AA15
NC_6 I/O7 PCM_A[7] PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146 PF_ALE TS1DATA[1]/GPIO94
AA15
J6
TS1DATA[1]/GPIO94
Y13
6 43 U20 T9 J6
ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95
Y13
K6
ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95
AA16
PCM_A[8] PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142 /PF_CE0 K6
EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96
AA16 EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96
W12
RY/BY I/O6 Y19 U9 IF_AGC TS1DATA[4]/GPIO97
W12
G7
TS1DATA[4]/GPIO97
AA13
7 42 PCM_A[9] PCMADR[8]/GPIO113 NF_CLE/GPIO141 /PF_CE1 L101 G7
I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
AA13 I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
W14
AA19 U11 BLM18PG121SN1D TS1DATA[6]/GPIO99
W14
J4
TS1DATA[6]/GPIO99
W13
RE I/O5 PCM_A[10] PCMADR[9]/GPIO115 NF_RBZ/GPIO147 /F_RB J4
ET_COL/GPIO60 TS1DATA[7]/GPIO100
W13
J5
ET_COL/GPIO60 TS1DATA[7]/GPIO100
Y15
8 41 AA20 V9 J5
ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
Y15 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
W15
PCM_A[11] PCMADR[10]/GPIO119 NF_REZ/GPIO144 /PF_OE IF_AGC IF_AGC TS1VALID/GPIO101
W15
H19
TS1VALID/GPIO101
CE NC_25 W21 U10 R193 C119 H19
LCK/GPIO194 G20
LCK/GPIO194
B3
9 40 PCM_A[12] PCMADR[11]/GPIO117 NF_WEZ/GPIO145 /PF_WE 10K 0.1uF G20
LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13
B3
G19
LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13
A3
V20 T10 IF_AGC G19
LHSYNC/GPIO196 PM_SPI_SCK/GPIO1
A3
G21
LHSYNC/GPIO196 PM_SPI_SCK/GPIO1
A4
NC_7 NC_24 PCM_A[13] PCMADR[12]/GPIO109 NF_WPZ/GPIO199 /PF_WP R196 G21
LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0
A4 LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0
C3
10 39 Y17 0 PM_SPI_SDI/GPIO2
C3
J17
PM_SPI_SDI/GPIO2
A2
PCM_A[14] PCMADR[13]/GPIO112 IF_AGC_MAIN J17
UART2_RX/GPIO69 PM_SPI_SDO/GPIO3
A2
J16
UART2_RX/GPIO69 PM_SPI_SDO/GPIO3
NC_8 NC_23 V18 W2 C120 J16
UART2_TX/GPIO70 E8
UART2_TX/GPIO70
B1
11 38 PCMADR[14]/GPIO111 IF_AGC TU_SIF 0.047uF
E8 B1 UART3_TX/GPIO52 RP
0.1uF R198TU_SIF
UART3_TX/GPIO52 RP D7 C2
V19 W1 C115 47 D7
UART3_RX/GPIO53 TN
C2
U6
UART3_RX/GPIO53 TN
C1
VCC_1 VCC_2 PCM_D[0-7] /PCM_CD PCMCD_N/GPIO135 SIFM 25V U6
GPIO46[CTS] TP
C1
V6
GPIO46[CTS] TP
B2
12 37 W19 W3 C116 0.1uF R199 47 IF_AGC V6
GPIO47[RTS] RN
B2
K15
GPIO47[RTS] RN
/PCM_CE PCMCE_N/GPIO120 SIFP C123
K15
UART1_TX/GPIO48 L16
UART1_TX/GPIO48
D2
VSS_1 VSS_2 PCM_D[0] U18 V2 TU_SIF TU_SIF 1000pF
L16
UART1_RX/GPIO49 SPDIF_IN/GPIO161
D2 UART1_RX/GPIO49 SPDIF_IN/GPIO161
D1
D1
13 36 PCMDATA[0]/GPIO131 IM SPDIF_OUT/GPIO162
PCM_D[1] V16 V1 ANALOG SIF TU_SIF H5
ET_TX_EN/GPIO63
SPDIF_OUT/GPIO162
D8
H5
K5
ET_TX_EN/GPIO63
D8
NC_9 NC_22 PCMDATA[1]/GPIO132 IP K5 ET_RXD[0]/GPIO65 HWRESET
14 35 PCM_D[2] W17 Close to MSTAR TU_SIF K4
ET_RXD[0]/GPIO65
ET_MDC/GPIO66
HWRESET
IRIN/GPIO5
E5
G4
K4
H6
ET_MDC/GPIO66 IRIN/GPIO5
E5
G4
PCMDATA[2]/GPIO133 R194-*1
H6
ET_MDIO/GPIO67 DDCA_CK/UART0_RX L5
ET_MDIO/GPIO67 DDCA_CK/UART0_RX
G5
NC_10 NC_21 PCM_D[3] Y20 AA2 R194
0 TUNER_IF_100_ohm
L5
ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX
G5 ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX
15 34 PCMDATA[3]/GPIO125 XIN IF_N_MSTAR U17 J18
PCM_D[4] R15 Y2 TUNER_IF_0_ohm IF OPT 100
U17
PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71
J18
R18
PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71
K18
CLE NC_20 PCMDATA[4]/GPIO124 XOUT C117 C121
R18
PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72
K18
V17
PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72
K16
16 33 PCM_D[5] AA18 0.1uF 100pF DTV_IF V17
PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73
K16
R16
PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73
L18
PCMDATA[5]/GPIO123 R195 0 R195-*1 R16
PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74
L18
U16
PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74
L17
ALE I/O4 PCM_D[6] T15 IF_P_MSTAR TUNER_IF_100_ohm U16 L17 PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75
TUNER_IF_0_ohm IF
PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75 T17
17 32 PCMDATA[6]/GPIO122 C118 C122 C124
T17
PCMADR[5]/NF_AD[5]/GPIO106 W18
PCMADR[5]/NF_AD[5]/GPIO106
T8
PCM_D[7] Y21 0.1uF 33pF 33pF 100
W18
PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146
T8
U20
PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146
T9
T9
WE I/O3 PCMDATA[7]/GPIO121 NON_ATSC NON_ATSC
U20
PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142 Y19
PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142
U9
18 31 W20 Y19
PCMADR[8]/GPIO113 NF_CLE/GPIO141
U9
AA19
PCMADR[8]/GPIO113 NF_CLE/GPIO141
U11
/PCM_IORD PCMIORD_N/GPIO116 For KR/US models
AA19
PCMADR[9]/GPIO115 NF_RBZ/GPIO147
U11
AA20
PCMADR[9]/GPIO115 NF_RBZ/GPIO147
V9
WP I/O2 V21 Close to MSTAR AA20
PCMADR[10]/GPIO119 NF_REZ/GPIO144
V9
W21
PCMADR[10]/GPIO119 NF_REZ/GPIO144
U10
19 30 /PCM_IOWR PCMIOWR_N/GPIO114 W21
PCMADR[11]/GPIO117 NF_WEZ/GPIO145
U10
V20
PCMADR[11]/GPIO117 NF_WEZ/GPIO145
T10
Y18 V20
PCMADR[12]/GPIO109 NF_WPZ/GPIO199
T10
Y17
PCMADR[12]/GPIO109 NF_WPZ/GPIO199
NC_11 I/O1 /PCM_IRQA PCMIRQA_N/GPIO110 Y17
PCMADR[13]/GPIO112 V18
PCMADR[13]/GPIO112
W2
20 29 T16 V18
PCMADR[14]/GPIO111 IF_AGC
W2
V19
PCMADR[14]/GPIO111 IF_AGC
W1
/PCM_OE PCMOE_N/GPIO118 V19
PCMCD_N/GPIO135 SIFM
W1
W19
PCMCD_N/GPIO135 SIFM
W3
R17 W19 W3 PCMCE_N/GPIO120 SIFP
R187
NC_12 NC_19 X101 C113 18pF PCMCE_N/GPIO120 SIFP U18 V2
21 28 /PCM_REG PCMREG_N/GPIO128 U18 V2 PCMDATA[0]/GPIO131 IM
1M
PCMDATA[0]/GPIO131 IM V16 V1
T18 24MHz C114 18pF
V16
PCMDATA[1]/GPIO132 IP
V1
W17
PCMDATA[1]/GPIO132 IP
NC_13 NC_18 PCM_RST PCM_RESET/GPIO134 W17
PCMDATA[2]/GPIO133 Y20
PCMDATA[2]/GPIO133
AA2
22 27 W16 Y20
PCMDATA[3]/GPIO125 XIN
AA2
R15
PCMDATA[3]/GPIO125 XIN
Y2
/PCM_WAIT PCMWAIT_N/GPIO105 R15
PCMDATA[4]/GPIO124 XOUT
Y2
AA18
PCMDATA[4]/GPIO124 XOUT
NC_14 NC_17 U15 AA18
PCMDATA[5]/GPIO123 T15
PCMDATA[5]/GPIO123
23 26 /PCM_WE PCMWE_N/GPIO198 T15
Y21
PCMDATA[6]/GPIO122 Y21
PCMDATA[6]/GPIO122
PCMDATA[7]/GPIO121
PCMDATA[7]/GPIO121 W20
W20 PCMIORD_N/GPIO116
NC_15 NC_16 V21
PCMIORD_N/GPIO116 V21
PCMIOWR_N/GPIO114
24 25 Y18
PCMIOWR_N/GPIO114 Y18
PCMIRQA_N/GPIO110
PCMIRQA_N/GPIO110 T16
T16 PCMOE_N/GPIO118
PCMOE_N/GPIO118 R17
R17 PCMREG_N/GPIO128
PCMREG_N/GPIO128 T18
T18 PCM_RESET/GPIO134
PCM_RESET/GPIO134 W16
W16 PCMWAIT_N/GPIO105
PCMWAIT_N/GPIO105 U15
U15 PCMWE_N/GPIO198
PCMWE_N/GPIO198
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1_EU 51
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
+3.3V_NORMAL
MODEL OPTION SOC_RESET +3.5V_ST
STby 3.5V Normal Power 3.3V DDR3 1.5V VDDC 1.05V +1.10V_VDDC
MO_M120(UHD120)
+1.10V_VDDC
MO_DVB_T2/C/S2
MO_S/W_EU/AJ
DDR_EXT:256
DDR_EXT:128
1K
1K
1K
1K
1K
1K
1K
L206
1K
MO_S/W_AJ
BLM18PG121SN1D AVDD_NODIE +1.5V_DDR VDDC : 2026mA
+3.3V_NORMAL VDD33
URSA11
+1.10V_VDDC +1.10V_VDDC
OPT
POWER_DET_RESET C289 C286 C252
+3.5V_ST 10uF 0.1uF 0.1uF AVDD_DDR0:55mA
C296 C210 C279
L204 10uF 0.1uF 0.1uF
R291
R222
R221
R206
R208
R211
R226
R290
0.1uF
0.1uF
0.1uF
BLM18PG121SN1D 10V
10uF
0.1uF
10V
1uF
OPT
0.1uF
0.1uF
0.1uF
0.1uF
10V
10V
0.1uF
1uF
1uF
R201 OPT 100 R266 L207
MODEL_OPT_0 470
10V
10V
R202 BLM18PG121SN1D AVDD_DMPLL
OPT 100
MODEL_OPT_1
C275
C248
C207
C254
C278
C228
C266
R203 OPT 100 OPT
10uF
10uF
C288 C205
C277
C280
C283
MODEL_OPT_2
C284
10uF
C204
10uF
C202 C200 10uF 0.1uF
C209
C235
C245
R204 OPT 100
C255
C259
AUD_LRCH 4.7uF 4.7uF
R225 OPT 100 10V 10V
MODEL_OPT_4
R228 OPT 100 L208 AVDD_DDR1:55mA
MODEL_OPT_5 SOC_RESET BLM18PG121SN1D AVDD_AU33
R230 OPT 100
MODEL_OPT_6
OPT 100
DDR_EXT:128 or NON
DDR_EXT:256 or NON
R229 C201
MO_M120_NON(UHD60)
AUD_LRCK R200 C240 C287 C241
470K 0.1uF 0.1uF 10uF 0.1uF
MO_S/W_NON_AJ
1K
MO_S/W_TW/CN
1K
1K
1K
1K
1K
1K
1K
MO_DVB_T/C
URSA9
R212
R294
R293
R224
R223
R207
R209
R227
+3.5V_ST PM MODEL OPTION
R177
10K PM_MODEL_OPT_0
OPT
PM_MODEL_OPT_0
- HIGH : Non_UHD
R176 - LOW :: UHD
10K
PM_MODEL_OPT_1
MODEL OPTION - Not Use (Ready)
PIN NAME PIN NO. LOW HIGH
PM_model_opt_0 E7 UHD Non_UHD
MODEL_OPT_0 J5 MO_FHD MO_HD
MODEL_OPT_1 H19 MO_S/W_NON_AJ MO_S/W_AJ
MODEL_OPT_2 G20 MO_DVB_T/C MO_DVB_T2/C/S2
MODEL_OPT_3 M1A_128M_UO4
G19 MO_M120_NON(UDH60) MO_M120(UHD120) IC101-*1
(AUD_LRCH) M1A_256M_UO4 LGE2133(128M)
IC101
MODEL_OPT_4 U6 DDR_EXT:256 or NON DDR_EXT : 128 LGE2134(256M) R4
L11
AVDD_AU33 AUVRM
U3
A6
AVDD_DDR0_CLK GND_1
L13 A13
MODEL_OPT_5 K5 MO_S/W_TW/CN MO_S/W_EU/AJ M11
K13
AVDD_DDR1_CLK
AVDD_DDR0_CMD
GND_2
GND_3
A15
A18
AVDD_DDR1_CMD GND_4
MODEL_OPT_6 K4 DDR_EXT:128 or NON DDR_EXT : 256
C5
K12
AVDD_DDR0_D_1 GND_5
B12
B14
AVDD_DDR0_D_2 GND_6
R4 U3 L12
AVDD_DDR0_D_3 GND_7
B16
MODEL_OPT_7 AVDD_AU33 AVDD_AU33 AUVRM AUVRM C6 B17
L5 URSA9 URSA11 L11 A6 K14
AVDD_DDR1_D_1
AVDD_DDR1_D_2
GND_8
GND_9
B19
(AUD_LRCK) L13
AVDD_DDR0_CLK GND_1
A13
L14
B5
AVDD_DDR1_D_3 GND_10
B20
C9
AVDD_DRAM_1 GND_11
AVDD_DDR1_CLK GND_2 B6
AVDD_DRAM_2 GND_12
C10
M11 A15 R8
AVDD_DVI_USB_MPLL_1 GND_13
C21
AVDD_DDR0_CMD GND_3 R9
AVDD_DVI_USB_MPLL_2 GND_14
D9
K13 A18 L7
AVDD_MOD_1 GND_15
E20
AVDD_DDR1_CMD GND_4 L8
AVDD_MOD_2 GND_16
F9
+1.5V_DDR C5 B12 P8
AVDD_NODIE GND_17
F11
AVDD_DDR0_D_1 GND_5 K9
AVDD_PLL GND_18
F13
K12 B14 R5
AVDD3P3_DMPLL GND_19
F15
AVDD_DDR0_D_2 GND_6 P11
AVDDL_MOD GND_20
F17
L12 B16 C7 F19
Memory OPTION C6
AVDD_DDR0_D_3
AVDD_DDR1_D_1
GND_7
GND_8
B17
M13
R6
A7
DVDD_DDR_1
DVDD_DDR_2
DVDD_NODIE
DVDD_RX_1_1
GND_21
GND_22
GND_23
GND_24
F21
G8
G9
K14 B19 M12 G10
Memory Auto AVDD_DDR1_D_2 GND_9 B7
DVDD_RX_1_2 GND_25
G11
MODEL_OPT_4 MODEL_OPT_6 L14 B20 M14
DVDD_RX_2_1 GND_26
G12
INT+EXT Det AVDD_DDR1_D_3 GND_10 N11
DVDD_RX_2_2
VDDC_1
GND_27
GND_28
G13
B5 C9 N12
VDDC_2 GND_29
G14
AVDD_DRAM_1 GND_11 N13 G15
128M Only 0 0 0 B6 C10 N14
VDDC_3
VDDC_4
GND_30
GND_31
G16
AVDD_DRAM_2 GND_12 N15
VDDC_5 GND_32
G17
R8 C21 P12
VDDC_6 GND_33
G18
AVDD_NODIE AVDD_DVI_USB_MPLL_1 GND_13 P13 H7
256M Only 1 0 0 R9 D9 P14
VDDC_7
VDDC_8
GND_34
GND_35
H8
AVDD_DVI_USB_MPLL_2 GND_14 L9
VDDP GND_36
H9
L7 E20 GND_37
H10
VDD33 AVDD_MOD_1 GND_15 AA10 H11
128M+128M 0 1 0 L8 F9
AVDD5V_MHL GND_38
GND_39
H12
AVDD_MOD_2 GND_16 GND_40
H13
P8 F11 GND_41
H14
AVDD_NODIE AVDD_NODIE GND_17 H15
128M+256M 0 0 1 VDD33
K9 F13
GND_42
GND_43
H16
AVDD_PLL GND_18 GND_44
H17
R5 F15 GND_45
H18
AVDD_DMPLL AVDD3P3_DMPLL GND_19 J7
256M+256M 1 0 1 +1.10V_VDDC P11 F17
GND_46
GND_47
J8
AVDDL_MOD GND_20 GND_48
J9
C7 F19 GND_49
J10
+1.10V_VDDC DVDD_DDR_1 GND_21 GND_50
J11
M13 F21 GND_51
J12
1uFC260 DVDD_DDR_2 GND_22 GND_52
J13
R6 G8 GND_53
J14
DVDD_NODIE GND_23 GND_54
K8
A7 G9 K10
Country Option M12
DVDD_RX_1_1
DVDD_RX_1_2
GND_24
GND_25
G10
GND_55
GND_56
GND_57
GND_58
K11
L10
M5
B7 G11 GND_59
M7
DVDD_RX_2_1 GND_26 M8
MODEL_OPT_1 MODEL_OPT_5 M14 G12
GND_60
GND_61
M9
DVDD_RX_2_2 GND_27 GND_62
M10
N11 G13 GND_63
N4
+1.10V_VDDC VDDC_1 GND_28 GND_64
N5
TW 0 0 N12 G14 GND_65
N6
VDDC_2 GND_29 GND_66
N7
N13 G15 GND_67
N8
VDDC_3 GND_30 GND_68
N9
N14 G16 GND_69
N10
EU 0 1 N15
VDDC_4 GND_31
G17
GND_70
P4
P5
GND_71
VDDC_5 GND_32 GND_72
P6
P12 G18 GND_73
P7
VDDC_6 GND_33 GND_74
P9
CN 1 0 P13 H7 GND_75
P10
VDDC_7 GND_34 GND_76
P15
P14 H8 GND_77
P16
VDDC_8 GND_35 GND_78
P17
L9 H9 GND_79
P18
AJ 1 1 VDD33 VDDP GND_36 GND_80
R10
H10 GND_81
R11
R12
GND_37 GND_82
AA10 H11 GND_83
R13
R14
AVDD5V_MHL GND_38 GND_84
H12 GND_EFUSE
K7
GND_39
H13
GND_40
H14
GND_41
H15 M1A_256M_UO7_AVS+ M1A_128M_UO7_AVS+
GND_42 IC101-*2 IC101-*3
H16 LGE2136(256M) LGE2135(128M)
GND_43
H17
GND_44
M1A_256M_UO4 H18 R4
AVDD_AU33 AUVRM
U3 R4
AVDD_AU33 AUVRM
U3
L11 L11
GND_45 AVDD_DDR0_CLK GND_1
A6
AVDD_DDR0_CLK GND_1
A6
IC101 J7 L13 A13 L13 A13
M1A_128M_UO4 M1A_256M_UO7_AVS+ M1A_128M_UO7_AVS+ GND_46 M11
AVDD_DDR1_CLK
AVDD_DDR0_CMD
GND_2
GND_3
A15 M11
AVDD_DDR1_CLK
AVDD_DDR0_CMD
GND_2
GND_3
A15
LGE2134(256M) IC101-*1 IC101-*2 IC101-*3 J8 K13
AVDD_DDR1_CMD GND_4
A18 K13
AVDD_DDR1_CMD GND_4
A18
C5 C5
LGE2133(128M) LGE2136(256M) LGE2135(128M) GND_47 AVDD_DDR0_D_1 GND_5
B12
AVDD_DDR0_D_1 GND_5
B12
J9 K12
AVDD_DDR0_D_2 GND_6
B14 K12
AVDD_DDR0_D_2 GND_6
B14
L12 L12
GND_48 AVDD_DDR0_D_3 GND_7
B16
AVDD_DDR0_D_3 GND_7
B16
J10 C6
AVDD_DDR1_D_1 GND_8
B17 C6
AVDD_DDR1_D_1 GND_8
B17
K14 K14
GND_49 AVDD_DDR1_D_2 GND_9
B19
AVDD_DDR1_D_2 GND_9
B19
OPT M4 T6 M4 T6 M4 T6 J11 L14
AVDD_DDR1_D_3 GND_10
B20 L14
AVDD_DDR1_D_3 GND_10
B20
M4 T6 TU_CVBS W7
ARC0 CVBSOUT1
V5 W7
ARC0 CVBSOUT1
V5 W7
ARC0 CVBSOUT1
V5 GND_50 B5
AVDD_DRAM_1 GND_11
C9 B5
AVDD_DRAM_1 GND_11
C9
HDMI_ARC ARC0 CVBSOUT1 DTV/MNT_VOUT RXC0N CVBS0 RXC0N CVBS0 RXC0N CVBS0 J12 B6
AVDD_DRAM_2 GND_12
C10 B6
AVDD_DRAM_2 GND_12
C10
C212 1uF W7 V5 0.047uF C236 R244 33 TU_CVBS Y8 U5 Y8 U5 Y8 U5 GND_51 R8
AVDD_DVI_USB_MPLL_1 GND_13
C21 R8
AVDD_DVI_USB_MPLL_1 GND_13
C21
RXC0N CVBS0 TU_CVBS W8
RXC0P CVBS1
T5 W8
RXC0P CVBS1
T5 W8
RXC0P CVBS1
T5 J13 R9
AVDD_DVI_USB_MPLL_2 GND_14
D9 R9
AVDD_DVI_USB_MPLL_2 GND_14
D9
Y8 U5 0.047uF C237SCART/AV2 33 R245 SCART/AV2 +3.3V_NORMAL RXC1N CVBS2 RXC1N CVBS2 RXC1N CVBS2 GND_52 L7
AVDD_MOD_1 GND_15
E20 L7
AVDD_MOD_1 GND_15
E20
RXC0P CVBS1 SC1/AV2_CVBS_IN Y9 V4 Y9 V4 Y9 V4 J14 L8 F9 L8 F9
RXC1P VCOM RXC1P VCOM RXC1P VCOM AVDD_MOD_2 GND_16 AVDD_MOD_2 GND_16
W8 T5 0.047uF C238 33 R246 AA9 AA9 AA9 GND_53 P8
AVDD_NODIE GND_17
F11 P8
AVDD_NODIE GND_17
F11
Used net when HDMI Switch used RXC1N CVBS2 COMP2_Y+/AV_CVBS_IN W9
RXC2N
E4 W9
RXC2N
E4 W9
RXC2N
E4
K8 K9
AVDD_PLL GND_18
F13 K9
AVDD_PLL GND_18
F13
Y9 V4 0.047uF C239 68 R247 C242 RXC2P I2S_OUT_BCK/GPIO165 RXC2P I2S_OUT_BCK/GPIO165 RXC2P I2S_OUT_BCK/GPIO165 GND_54 R5
AVDD3P3_DMPLL GND_19
F15 R5
AVDD3P3_DMPLL GND_19
F15
RXC1P VCOM AA7 F4 AA7 F4 AA7 F4 K10 P11
AVDDL_MOD GND_20
F17 P11
AVDDL_MOD GND_20
F17
AA9 1000pF R213 R210 I2S_I/F Y7
RXCCKN I2S_OUT_MCK/GPIO163
F7 Y7
RXCCKN I2S_OUT_MCK/GPIO163
F7 Y7
RXCCKN I2S_OUT_MCK/GPIO163
F7 GND_55 C7
DVDD_DDR_1 GND_21
F19 C7
DVDD_DDR_1 GND_21
F19
RXC2N 50V Close to MSTAR 10K 10K RXCCKP I2S_OUT_SD/GPIO166 RXCCKP I2S_OUT_SD/GPIO166 RXCCKP I2S_OUT_SD/GPIO166 K11 M13
DVDD_DDR_2 GND_22
F21 M13
DVDD_DDR_2 GND_22
F21
MN864778_RESET W9 E4 OPT OPT N2 F5 N2 F5 N2 F5 GND_56 R6 G8 R6 G8
RXC2P I2S_OUT_BCK/GPIO165 OPT AUD_SCK E3
CEC/GPIO6 I2S_OUT_WS/GPIO164
E3
CEC/GPIO6 I2S_OUT_WS/GPIO164
E3
CEC/GPIO6 I2S_OUT_WS/GPIO164 L10 A7
DVDD_NODIE GND_23
G9 A7
DVDD_NODIE GND_23
G9
DVDD_RX_1_1 GND_24 DVDD_RX_1_1 GND_24
AA7 F4 E2
DDCDA_CK/GPIO27
C4 E2
DDCDA_CK/GPIO27
C4 E2
DDCDA_CK/GPIO27
C4 GND_57 M12
DVDD_RX_1_2 GND_25
G10 M12
DVDD_RX_1_2 GND_25
G10
RXCCKN I2S_OUT_MCK/GPIO163 AUD_MASTER_CLK DDCDA_DA/GPIO28 USB0_DM DDCDA_DA/GPIO28 USB0_DM DDCDA_DA/GPIO28 USB0_DM M5 B7
DVDD_RX_2_1 GND_26
G11 B7
DVDD_RX_2_1 GND_26
G11
Y7 F7 W6 Y12 W6 Y12 W6 Y12 GND_58 M14
DVDD_RX_2_2 GND_27
G12 M14
DVDD_RX_2_2 GND_27
G12
RXCCKP I2S_OUT_SD/GPIO166 AUD_LRCH AA6
DDCDC_CK/GPIO31 USB1_DM
B4 AA6
DDCDC_CK/GPIO31 USB1_DM
B4 AA6
DDCDC_CK/GPIO31 USB1_DM
B4 M7 N11
VDDC_1 GND_28
G13 N11
VDDC_1 GND_28
G13
N2 F5 DDCDC_DA/GPIO32 USB0_DP DDCDC_DA/GPIO32 USB0_DP DDCDC_DA/GPIO32 USB0_DP GND_59 N12
VDDC_2 GND_29
G14 N12
VDDC_2 GND_29
G14
CEC_REMOTE_S7 CEC/GPIO6 I2S_OUT_WS/GPIO164 AUD_LRCK L4 AA12 L4 AA12 L4 AA12 M8 N13 G15 N13 G15
DDC_DL_EN E3 R216 R218 Y6
HOTPLUGA/GPIO23 USB1_DP
Y6
HOTPLUGA/GPIO23 USB1_DP
Y6
HOTPLUGA/GPIO23 USB1_DP
GND_60 N14
VDDC_3 GND_30
G16 N14
VDDC_3 GND_30
G16
VDDC_4 GND_31 VDDC_4 GND_31
DDCDA_CK/GPIO27 10K 10K F1
HOTPLUGC/GPIO25
J2 F1
HOTPLUGC/GPIO25
J2 F1
HOTPLUGC/GPIO25
J2
M9 N15
VDDC_5 GND_32
G17 N15
VDDC_5 GND_32
G17
E2 C4 OPT OPT C208 RXA0N BIN0M RXA0N BIN0M RXA0N BIN0M GND_61 P12
VDDC_6 GND_33
G18 P12
VDDC_6 GND_33
G18
MN864778_RESET DDCDA_DA/GPIO28 USB0_DM WIFI_DM G3 J3 G3 J3 G3 J3 M10 P13
VDDC_7 GND_34
H7 P13
VDDC_7 GND_34
H7
R205 W6 Y12 15pF G1
RXA0P BIN0P
K3 G1
RXA0P BIN0P
K3 G1
RXA0P BIN0P
K3 GND_62 P14
VDDC_8 GND_35
H8 P14
VDDC_8 GND_35
H8
10K URSA_RESET_READY DDCDC_CK/GPIO31 USB1_DM SIDE_USB1_DM 50V RXA1N GIN0M RXA1N GIN0M RXA1N GIN0M N4 L9
VDDP GND_36
H9 L9
VDDP GND_36
H9
R295 0 AA6 B4 G2 J1 G2 J1 G2 J1 GND_63 H10 H10
OPT L_DIM_EN DDCDC_DA/GPIO32 USB0_DP WIFI_DP OPT H3
RXA1P GIN0P
K2 H3
RXA1P GIN0P
K2 H3
RXA1P GIN0P
K2 N5 AA10
GND_37
H11 AA10
GND_37
H11
AVDD5V_MHL GND_38 AVDD5V_MHL GND_38
L4 AA12 H2
RXA2N RIN0M
K1 H2
RXA2N RIN0M
K1 H2
RXA2N RIN0M
K1 GND_64 GND_39
H12
GND_39
H12
HDMI_HPD_1 HOTPLUGA/GPIO23 USB1_DP SIDE_USB1_DP RXA2P RIN0P RXA2P RIN0P RXA2P RIN0P N6 GND_40
H13
GND_40
H13
Y6 F3 M6 F3 M6 F3 M6 GND_65 GND_41
H14
GND_41
H14
HDMI_HPD_2 HOTPLUGC/GPIO25 RXACKN HSYNC0 RXACKN HSYNC0 RXACKN HSYNC0 N7 H15 H15
Used net when WIFI used F2 L6 F2 L6 F2 L6 GND_42 GND_42
F1 J2 EU RXACKP VSYNC0 RXACKP VSYNC0 RXACKP VSYNC0 GND_66 GND_43
H16
GND_43
H16
HDMI_RX0- RXA0N BIN0M C221 0.047uFEU R232 68 N8 GND_44
H17
GND_44
H17
G3 J3 EU WIFI_DM U4 L2 U4 L2 U4 L2 GND_67 GND_45
H18
GND_45
H18
HDMI_RX0+ RXA0P BIN0P C222 0.047uFEU R233 EU 33 SC1_B+/COMP1_Pb+ T4
EAR_OUTL BIN1M
L3 T4
EAR_OUTL BIN1M
L3 T4
EAR_OUTL BIN1M
L3
N9 GND_46
J7
GND_46
J7
G1 K3 EAR_OUTR BIN1P EAR_OUTR BIN1P EAR_OUTR BIN1P GND_68 GND_47
J8
GND_47
J8
HDMI_RX1- RXA1N GIN0M C223 0.047uFEU R234 68 WIFI_DP P2 M1 P2 M1 P2 M1 N10 GND_48
J9
GND_48
J9
G2 J1 EU R2
AUL1 GIN1M
M2 R2
AUL1 GIN1M
M2 R2
AUL1 GIN1M
M2 GND_69 GND_49
J10
GND_49
J10
HDMI_RX1+ RXA1P GIN0P C224 0.047uFEU R235 EU 33 SC1_G+/COMP1_Y+ AUL2 GIN1P AUL2 GIN1P AUL2 GIN1P P4 GND_50
J11
GND_50
J11
H3 K2 T1 N1 T1 N1 T1 N1 GND_70 J12 J12
AUL3 RIN1M AUL3 RIN1M AUL3 RIN1M GND_51 GND_51
HDMI_RX2- RXA2N RIN0M C225 0.047uFEU R236 EU 68 R3 N3 R3 N3 R3 N3 P5 GND_52
J13
GND_52
J13
H2 K1 Used net when TI Amp used R1
AUR1 RIN1P
M3 R1
AUR1 RIN1P
M3 R1
AUR1 RIN1P
M3 GND_71 GND_53
J14
GND_53
J14
HDMI_RX2+ RXA2P RIN0P C226 0.047uFEU R237 33 SC1_R+/COMP1_Pr+ AUR2 SOGIN1 AUR2 SOGIN1 AUR2 SOGIN1 P6 GND_54
K8
GND_54
K8
F3 M6 T3 T3 T3 GND_72 GND_55
K10
GND_55
K10
HDMI_CLK- RXACKN HSYNC0 SC1_ID AUD_MASTER_CLK U2
AUR3
U2
AUR3
U2
AUR3 P7 GND_56
K11
GND_56
K11
F2 L6 AUOUTL0 AUOUTL0 AUOUTL0 GND_73 GND_57
L10
GND_57
L10
HDMI_CLK+ RXACKP VSYNC0 SC1_FB V3
AUOUTR0
V3
AUOUTR0
V3
AUOUTR0
P9 GND_58
M5
GND_58
M5
M7 M7
T2 T2 T2 GND_74 GND_59 GND_59
AUVAG AUVAG AUVAG P10 M8 M8
H/P OUT U4 L2 GND_75
GND_60
GND_61
M9
GND_60
GND_61
M9
HP_LOUT EAR_OUTL BIN1M C227 0.047uF R238 68 P15 GND_62
M10
GND_62
M10
T4 L3 GND_76 GND_63
N4
GND_63
N4
HP_ROUT EAR_OUTR BIN1P C229 0.047uF R239 33 COMP2_Pb+ P16 GND_64
N5
GND_64
N5
P2 M1 GND_77 GND_65
N6
GND_65
N6
SC1/COMP1_L_IN 2.2uF C214 EU AUL1 GIN1M C230 0.047uF R240 68 P17 GND_66
N7
GND_66
N7
R2 M2 GND_78 GND_67
N8
GND_67
N8
AV2_L_IN 2.2uF C203 AV2 T1 AUL2 GIN1P C231 0.047uF R241 33 COMP2_Y+/AV_CVBS_IN P18 GND_68
N9
GND_68
N9
N1 GND_79 GND_69
N10
GND_69
N10
COMP2_L_IN C211 2.2uF C216 AUL3 RIN1M C232 0.047uF R242 68 R10 GND_70
P4
GND_70
P4
1000pF R3 N3 GND_80 GND_71
P5
GND_71
P5
50V SC1/COMP1_R_IN 2.2uF C217 EU AUR1 RIN1P C233 0.047uF R243 33 COMP2_Pr+ R11 GND_72
P6
GND_72
P6
ATV_1000P R1 M3 GND_81 GND_73
P7
GND_73
P7
AV2_R_IN 2.2uF C206 AV2 T3 AUR2 SOGIN1 C234 1000pF R12 GND_74
P9
GND_74
P9
P10 P10
OPT GND_82 GND_75 GND_75
COMP2_R_IN C215 2.2uF C219 AUR3 R13 GND_76
P15
GND_76
P15
1000pF U2 GND_83 GND_77
P16
GND_77
P16
50V SCART1_Lout AUOUTL0 R14 GND_78
P17
GND_78
P17
ATV_1000P V3 GND_84 GND_79
P18
GND_79
P18
SCART1_Rout AUOUTR0 K7 GND_80
R10
GND_80
R10
AUDIO OUT T2 GND_EFUSE GND_81
R11
GND_81
R11
AUVAG GND_82
R12
GND_82
R12
C213 C220 GND_83
R13
GND_83
R13
1uF 4.7uF GND_84
R14
GND_84
R14
AUVRM GND_EFUSE
K7
GND_EFUSE
K7
L214
BLM18PG121SN1D
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN2_NON_EU 52
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Main AMP
+3.3V_NORMAL
R5606
100
AMP_RESET
1/16W L5602
L5601 C5629
R5615 10uH
4.7K 1000pF
BLM18PG121SN1D SPK_L+
50V
SP-7850_10
50V
AUD_SCK
+24V_AMP
PGND1A 22000pF
R5607
C5609
3.3
+24V +24V_AMP 1/10W R5609
C5622
C5604 0.1uF
C5603 C5615 50V 4.7K
[EP]GND
10uF C5630 390pF
L5600 0.1uF C5610 C5611 50V
VDD_IO
GND_IO
PVDD1A
PVDD1B
10V 0.1uF 4.7uF
UBW2012-121F 16V 10uF 50V
50V
CLK_I
RESET
BST1A
OUT1A
35V 3216
C5621
0.47uF
50V
C5601
AD
0.1uF C5616
390pF
50V 50V
C5623 R5610
R5608
3.3
0.1uF
50V 4.7K
SPEAKER_L
40
39
38
37
36
35
34
33
32
31
1/10W
L5603
NC_1 1 30 OUT1B 10uH
SPK_L-
SP-7850_10
VDD_PLL 2 29 PGND1B C5617
THERMAL 22000pF
NC_2 3 41 28 BST1B 50V
C5605
1uF
10V GND 4 27 VDR1
NC_3 5 IC5600 26 NC_5
C5606
1uF
10V
DVDD 6 NTP7515 25 AGND
AUD_LRCH
SDATA 7 24 VDR2
WCK 0x54 BST2A
C5618
1uF
C5619
1uF
AUD_LRCK 8 23 10V 10V
NC_4 9 22 PGND2A C5620
22000pF
R5604
AMP_SDA
100 SDA 10 21 OUT2A 50V
R5605
100
11
12
13
14
15
16
17
18
19
20
AMP_SCL
C5607 C5608
33pF 33pF
L5604
50V 50V 10uH
SCL
FAULT
MONITOR_0
MONITOR_1
MONITOR_2
BST2B
PGND2B
OUT2B
PVDD2B
PVDD2A
SPK_R+
SP-7850_10
+3.3V_NORMAL +24V_AMP
R5611
3.3
1/10W C5627 R5613
R5601 0.1uF 4.7K
10K C5631 C5624 C5626 50V
C5614 390pF 0.47uF
4.7uF
R5603 C5613 0.1uF
50V 50V
50V 50V
SPEAKER_R
10uF 3216 C5625
C 100 390pF
35V 50V
R5600 C5602 C5628 R5614
B Q5600 C5612
AMP_MUTE 1000pF R5612 0.1uF 4.7K
10K MMBT3904(NXP) 50V 22000pF 3.3 50V
OPT E OPT 1/10W L5605
50V
I2S_AMP
10uH
SPK_R-
SP-7850_10
OPT
R5602
0
POWER_DET
I2S_AMP
WAFER-ANGLE
SPK_L+
4
SPK_L-
3
SPK_R+
2
SPK_R-
1
P5600
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AUDIO[NTP] 56
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
L14 TUNER_EU T/C_T2/C/S2_CHINA
TU_I2C Multi option
TU3702 TU3704 TU3705 TU3703 TU3701
TU_I2C_FILTER
TDJK-T301F TDJM-K301F TDJM-G305D TDJM-C401D TDJM-G301D TU_ATSC
C3705-*1
TU_ATSC R3738-*1
R3716-*1 MLG1005SR27JT
1.8K
18pF
TUNER_CSA_H/NIM TUNER_CSA_T2 TUNER_AJ/JA_T2 TUNER_CHINA TUNER_T2/C/S2 +3.3V_LNA TU_ATSC
TU_ATSC
R3717-*1 TU_I2C_FILTER
1.8K R3739-*1
C3707-*1 MLG1005SR27JT
18pF
+3.3V +3.3V +3.3V +3.3V +3.3V
1 1 1 1 1
C3708 C3714
0.1uF
NC NC_1 NC_1 NC_1 NC_1 100pF
50V 16V
2 2 2 2 2 +3.3V_TU
IF_AGC_CSA
R3714-*1 100
DIF_AGC NC_2 NC_2 NC_2 AIF_AGC should be guarded by ground
3 3 3 3 3 C3703 R3714 IF_AGC_MAIN TU_NON_ATSC TU_NON_ATSC
0.1uF 0
16V IF_AGC_NON_CSA R3716 R3717
SCL_RF SCL_RF SCL_RF SCL_RF SCL_RF IF_AGC TU_I2C_NON_FILTER
R3738 33
1K 1K
4 4 4 4 4 TU_SCL
SDA_RF SDA_RF SDA_RF SDA_RF SDA_RF TU_I2C_NON_FILTER
5 5 5 5 5 C3705 C3707
R3739 33
TU_SDA
TU_NON_ATSC_NON_CHINA C3710 C3711 R3726 OPT 0
20pF 20pF 20pF 20pF
DIF[P] NC_3 NC_3 NC_3 AIF[P] R3709
10
TU_NON_ATSC TU_NON_ATSC
TU_NON_ATSC TU_NON_ATSC +3.3V_TU
6 6 6 6 6 IF_P_MSTAR
TU_ATSC
R3709-*1 TU_SIF TU_SIF
DIF[N] NC_4 NC_4 NC_4 AIF[N] R3725
470 R3728
7 7 7 7 7 0
IF_N_MSTAR
82
TU_SIF
TU_NON_ATSC_NON_CHINA
R3710
SIF SIF SIF SIF SIF 10 C3726
E
8 8 8 8 8 Q3700
TU_ATSC 0.1uF R3724 B 2N3906S-RTK
R3710-*1 4.7K
TU_SIF_TR_KEC(MULTI)
CVBS CVBS CVBS CVBS CVBS 16V
TU_SIF
TU_SIF C
9 9 9 9 9 0
close to TUNER
NC_5 NC_5 NC_5 NC_2
10 10 10 10 CHINA
AR3700-*1 47
E
Q3700-*1
A1 B1 +3.3V_RF +3.3V_RF +3.3V_RF +3.3V_RF +3.3V_TU +3.3V_TU B MMBT3906(NXP)
TU_SIF_TR_NXP(MULTI)
A1 B1 11 11 11 11 T2_OR_CHINA
C3718
T2_OR_CHINA
C3722 TU_CVBS TU_CVBS
C
AR3700
100pF 0.1uF 0 R3732 R3735
47 ERROR ERROR ERROR ERROR 50V 16V 1/16W
220 220
12 12 12 12
TU_GND_A
TU_GND_B
FE_TS_ERR CHINA TU_CVBS
AR3701-*1 47 E
FE_TS_CLK
GND_1 GND_1 GND_1 GND_1 FE_TS_SYNC Q3701
SHIELD 13 13 13 13 FE_TS_VAL B 2N3906S-RTK
C TU_CVBS_TR_KEC(MULTI)
T2
MCLK MCLK MCLK MCLK
14 14 14 14 R3731 OPT 0
CHINA
AR3702-*1 47 E TU_CVBS_TR_NXP(MULTI)
SYNC SYNC SYNC SYNC Q3701-*1
15 15 15 15 B MMBT3906(NXP)
TU3700 C
VAILD VAILD VAILD VALID
TDJH-G301D 16 16 16 16
AR3701
0 FE_TS_DATA[0-7]
D0 D0 D0 D0 1/16W
TUNER_T/C 17 17 17 17 FE_TS_DATA[0]
FE_TS_DATA[1]
+3.3V D1 D1 D1 D1 FE_TS_DATA[2]
1 18 18 18 18 FE_TS_DATA[3]
T2
NC_1 D2 D2 D2 D2
2 19 19 19 19
IF_AGC D3 D3 D3 D3
3 20 20 20 20
AR3702
0
SCL_RF D4 D4 D4 D4 1/16W
4 21 21 21 21 FE_TS_DATA[4]
+3.3V_LNA +3.3V_TU
FE_TS_DATA[5]
SDA_RF D5 D5 D5 D5 FE_TS_DATA[6]
5 22 22 22 22 FE_TS_DATA[7] +3.3V_NORMAL
T2 L3701 L3704
IF[P] D6 D6 D6 D6 UBW2012-121F UBW2012-121F
6 23 23 23 23 C3739 C3706 C3730 C3731 C3733 C3738
22uF 0.1uF 22uF 0.1uF 22uF 0.1uF
IF[N] D7 D7 D7 D7 10V 16V 10V 16V 10V 16V
7 24 24 24 24
T2_OR_CHINA
SIF RESET_DEMOD RESET_DEMOD RESET_DEMOD RESET_DEMOD R3719 IC3701
AP7361-Y-13
8 25 25 25 25 10
DEMOD_RESET
+3.3V_TU +1.2V_DEMOD
T2_OR_CHINA T2_OR_CHINA
C3716 +3.3V_DEMOD R3723
CVBS +3.3V_DEMOD +3.3V_DEMOD +3.3V_DEMOD +3.3V_DEMOD 0.1uF 3.3K EN
1 T2_OR_CHINA 5
OUT
9 26 26 26 26 16V
T2_OR_CHINA
T2_OR_CHINA C3725
C3721 C3723 1uF GND T2_OR_CHINA
SCL_DEMOD SCL_DEMOD SCL_DEMOD SCL_DEMOD T2_OR_CHINA 100pF 0.1uF 10V 2 T2_OR_CHINA R3737
1
27 27 27 27 R3711
C3702
22
DEMOD_SCL
50V 16V
T2_OR_CHINA R3733
12K T2_OR_CHINA
ADJ/NC IN 1% C3737
20pF 3 4 R1
A1 B1 +1.2V_DEMOD +1.2V_DEMOD +1.2V_DEMOD +1.2V_DEMOD 50V
T2_OR_CHINA
+1.2V_DEMOD 10uF
10V
A1 B1 28 28 28 28 C3713 C3729 T2_OR_CHINA
100pF 0.1uF C3732
T2 50V 16V
47 NC_6 NC_6 NC_6 NC_3 R3707 T2_OR_CHINAT2_OR_CHINA
0.1uF
16V
29 29 29 29 0
LNB_TX
TU_GND_A
TU_GND_B
T2_OR_CHINA
SDA_DEMOD SDA_DEMOD SDA_DEMOD SDA_DEMOD T2_OR_CHINA
R3712 22
R3734
SHIELD 30 30 30 30 C3704 DEMOD_SDA
22K
1%
20pF R2
50V
LNB T2_OR_CHINA Vo=0.8*(1+R1/R2)
31 C3709 LNB_OUT
0.1uF
50V GND seperation for CHINA tuner
A1 B1 A1 B1 A1 B1 GND
TU_GND_A
T2_OR_CHINA
TU_GND_B
A1 B1 A1 B1 A1 B1 32
TU_KR/US/EU/AJ
TU_KR/US/EU/AJ
TU_KR/US/EU/AJ
TU3700-*1 TU_GND_B
47 47 47 C3701
TDJH-H301F 1000pF
TU_GND_A
TU_GND_B
TU_GND_A
TU_GND_B
TU_GND_A
TU_GND_B
R3708
R3713
R3715
C3712 630V
TUNER_NTSC TU_GND_B
1000pF
A1 B1 R3740
0
0
0
+3.3V 630V 0
1 SHIELD SHIELD SHIELD A1 B1 CHINA
NC_1
2
DIF_AGC 47
3
TU_GND_A
TU_GND_B
SCL_RF +3.3V_TU +3.3V_DEMOD
4
T2_OR_CHINA
SDA_RF L3702
5 SHIELD BLM18PG121SN1D
DIF[P]
6
DIF[N] T2_OR_CHINA T2_OR_CHINA
7 T2_OR_CHINA
C3724 C3734 C3727
SIF 0.1uF 10uF 0.1uF
8 16V
10V 16V
CVBS
9
ERROR & VALID PIN
A1 B1
A1 B1 T2_OR_CHINA
47 R3736
FE_TS_VAL 0
FE_TS_VAL_ERR
SHIELD FE_TS_ERR
GPIO must be added.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_EU 67
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
MAX 4.7A
+1.5V URSA DDR URSA11 Core
+3.3V_U_NORMAL +1.5V_U_DDR
R13404
IC13403 L13406 10K
L13405
AZ1117EH-ADJTRG1 CB2012PK501T
BLM18PG121SN1D R13407
R13408
1/16W
39K
R1
10K
IN OUT
1%
1/16W
ADJ/GND 5%
1%
1/16W
91K
R13406
C13410 R13416
10uF 1K R1 VID_CTRL
1/16W C13420 C13403
R13411R13409
10V C13421 C13422
[EP]
GND2
GND1
NC_3
TRIP
1% 22uF 22uF D13402 1000pF
10uF 2.5V
VO
4.7K 12K
20K 1%
10V 10V
1%
10V 50V
1%
1/16W
27K
R13405
1.3A OPT
R13410
R13417
220
OPT R2
1/16W R2
28
27
26
25
24
+3.3V_U_NORMAL
1% RF FB
1%
1 23
R13425 THERMAL
10K PGOOD 2 29 22 GND
+12V
0 R13401 EN 3 21 MODE
16V
0.1uF
VBST IC13402 VREG L13402
4 20
TPS53513RVER
R13403
10K C13405 NC_1
R13426 5 19 VDD
4.7
OPT C13402 R13400
2K SW_1 NC_2
6 18
0.1uF 1/16W C13407 C13409
SW_2 7 17 VIN_3 C13408
16V 5% 1uF 10uF
VDDC 10uF
10V 16V
L13403 SW_3 8 16 VIN_2 16V
1.0uH
SW_4 9
8A 15 VIN_1
R13402
10
11
12
13
14
1/10W
3.3
D13400
C13400 C13401 C13411
5%
C13406
PGND_1
PGND_2
PGND_3
PGND_4
PGND_5
22uF 22uF 22uF
30V
2200pF
ZD13400
50V
2.5V
OPT
C13404
470pF
50V
Vout=0.6*(1+R1/R2)
+12V
+3.3V URSA VID_CTRL D
+3.3V_U_NORMAL
+3.3V_U_NORMAL VID_CTRL Q13006-*1
URSA11_VID URSA11_VID
G 2N7002K
URSA11_VID URSA11_VID
L13401 URSA11_VID_FET_DIODES(MULTI)
R13591
R13593
BLM18PG121SN1D S
1/16W
+3.3V_NORMAL
1/16W
100K
100K
1%
1%
R13587
C13412 C13413
R13588
1/16W
1/16W
10uF 0.1uF
20K
20K
R13595
1%
R13594
1%
16V
IC13401
OPT
OPT
R13415
10K
10K
BD9D321EFJ [EP]
10K Q13006
D 2N7002KA
EN VIN URSA11_VID_FET_KEC(MULTI)
1 8 G R13589 0
16V VID0
THERMAL
0.1uF S URSA11_VID
R13412 R13413 FB BOOT C13417
9
2 7
R1 68K 6.8K L13404
1% 1% 2.2uH
VREG SW
3 6
C13414 D
100pF VLS5045EXT-2R2N Q13007
50V
SS GND 2N7002KA
4
3A 5 C13418
22uF
C13419
22uF D13401 G URSA11_VID_FET_KEC(MULTI) R13590 0
VID1
1/16W
10V 10V 5V URSA11_VID
R13414 S
22K C13415 C13416
1uF 2200pF D
1% 10V 50V Q13007-*1
G 2N7002K R13418 R13419
R2 10K 10K
URSA11_VID_FET_DIODES(MULTI)
URSA11_VID URSA11_VID
S
R1:10K/R2:16.7K, V=0.95V(VID0=L,VID1=L)
R1:10K/R2:16.7K//120K, V=1.008V(VID0=H,VID1=L)
R1:10K/R2:16.7K//120K, V=1.008V(VID0=L,VID1=H)
R1:10K/R2:16.7K//120K//120K, V=1.05V(VID0=H,VID1=H)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. URSA_DCDC 134
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
+3.3V_U_NORMAL
URSA11_PQ_DEBUG
IC1351-*1 P1352
12507WS-04L
R13576
W25Q32FVSSIG
IC119 URSA11_PQ_DEBUG
LGE5352(URSA11) CS VCC 10K
SPI Flash DO[IO1]
1 8
HOLD_OR_RESET[IO3]
1
2 7
R13582
AD26 WP[IO2] CLK 2
33 URSA_UART2_RX
URSA_RESET PAD_RESET
AD11
3 6
AH4
PAD_I2C_HSC_SDA/[VSYNC_LIKE_SPI2]
AC10
URSA11_PQ_DEBUG
GND DI[IO0]
XIN_URSA AH3
PAD_XOUT PAD_I2C_HSC_SCL/[VSYNC_LIKE_SPI3] 4 5
3
XO_URSA PAD_XIN
PAD_SPI1_CK/GPIO58
AC23
URSA_OPT_0
R13579
SDA2_+3.3V_URSA AE9 AD24 URSA_FLASH_WINDBOND(MULTI)
4 33 URSA_UART2_TX
PAD_I2C_S_SDA PAD_SPI1_DI/GPIO59 Div_BIT0
AR1351 AD9 AD23
SCL2_+3.3V_URSA 33 PAD_I2C_S_SCL PAD_SPI2_CK/GPIO56 Div_BIT1 +3.3V_U_NORMAL URSA11_PQ_DEBUG
AC22 5 C1356
PAD_SPI2_DI/GPIO57 URSA_OPT_4
AD10
PAD_I2C_M_SDA PAD_SPI3_CK/GPIO54
AE24
URSA_L/D_CK IC1351 0.1uF
16V
AE10 AE22
PAD_I2C_M_SCL/[VSYNC_LIKE_SP1]PAD_SPI3_DI/GPIO55
AD22
URSA_L/D_DI MX25L3235E URSA11_PQ_DEBUG
PAD_SPI4_CK/GPIO52 URSA_OPT_5
E8 AC21
URSA_UART2_TX PAD_GPIO00/[UART2_TX] PAD_SPI4_DI/GPIO53 URSA_OPT_6
F7
URSA_UART2_RX PAD_GPIO01/[UART2_RX]
AC24
PAD_VSYNC_LIKE/GPIO40 URSA_L/D_VSYNC CS VCC C1353
E7 1 8
URSA_UART1_TX PAD_GPIO02/[UART1_TX] SPI_CZ 0.1uF
F6 16V
PAD_GPIO03/[CHIP_VDET] +3.3V_U_NORMAL URSA_FLASH_MX(MULTI)
AE13 DIM0
PAD_DIM00/GPIO32 +3.3V_U_NORMAL
AD13 DIM1 OPT SO/SIO1 HOLD/SIO3
PAD_DIM01/GPIO33 R13559 33 URSA11_SYS_DEBUG
AD27 AC13 DIM2 R13540 2 7
SPI_CZ AC27
PAD_SPI_CZ PAD_DIM02/GPIO34
AE15
10K SPI_DO P1353
PAD_SPI_CK PAD_DIM03/GPIO35
10K R13569 12507WS-04L R13573
SPI_CK AR1352 AC28 AC14
SPI_DI 33 AC26
PAD_SPI_DI PAD_DIM04/GPIO36
AD14
URSA_OPT_1
R13541 WP/SIO2 SCLK 10K
R13558 1K
SPI_DO PAD_SPI_DO PAD_DIM05/GPIO37
AD15
URSA_BIT0
URSA_BIT1
10K
FLASH_WP_URSA 3 6 SPI_CK URSA11_SYS_DEBUG
R13517 0 AE25
PAD_DIM06/GPIO38
AC15 1
5V_DET_HDMI_2 PAD_INTERUPT_R21 PAD_DIM07/GPIO39 URSA_BIT2 OPT
AD25 R13580
PAD_INTERUPT_R20 GND SI/SIO0 33
R13503 0 R13562 1K 4 5 SPI_DI 2 URSA_UART1_RX
PAD_TCON0/STV2
E4
D5
FRC_FLASH_WP URSA11_SYS_DEBUG
OPT
D7
PAD_TCON1/OE
E6 R13564 3
PAD_IRE/[UART1_RX] PAD_TCON2/YV1C
E5 10K R13581
URSA_UART1_RX PAD_TCON3/CPV
F5 OPT 33 URSA_UART1_TX
4
PAD_TCON4/STV1
F4
R13518 0 AC25
PAD_TCON5/SFT
D6
URSA11_SYS_DEBUG
5 C1355
PAD_TESTPIN PAD_TCON6/TPV
AC9 D4 0.1uF
GND_EFUSE PAD_TCON7/POL
R13519 0 16V
URSA11_SYS_DEBUG
AC4
PAD_TCON8/[VX1T_HTPDN] HTPDAn
AC19 AD4
OPTR13504 33
GPIO[09] PAD_TCON9/[VX1T_LOCKN]
AD19 AA4
OPTR13505 33
GPIO[08] PAD_TCON10/[HDMI_R_DDC_CLK3]
R13520 0 DDC_SCL_HDMI1 R13557
AC18 AB5 10K
VID1 GPIO[07] PAD_TCON11/[HDMI_R_DDC_DAT3]
AB4 R13521 0 DDC_SDA_HDMI1 URSA_TX_HTPD_pulldown
PAD_TCON12/[HDMI_R_HP3]
AE19 AA5
5V_DET_HDMI_1
VID0 GPIO[06] PAD_TCON13/[HDMI_R_CEC3]
AD5 R13501 0
GPIO (RESERVED FOR U11)
PAD_TCON14/[HDMI_T_CEC]
AD7 AE5
U11 ONLY, NC FOR U11P
URSA_BIT3
OPTR13509 33 AE7
AC7
GPIO[64]
GPIO[65]
PAD_TCON15/[HDMI_T_HPD]
AD21
LOCKAn Clock for URSA11 +3.3V_U_NORMAL URSA Reset
OPTR13510 33
GPIO[66] PAD_GPIO04 Data_Format_1 +3.3V_U_NORMAL
AD8 AD20
OPTR13511 33
GPIO[67] PAD_GPIO05 Data_Format_0
AC6
C1351
R13522 0 DDC_SCL_HDMI2
GPIO[74]
AC8 AC5
OPTR13512 33
8pF
50V
GPIO[63] GPIO[75]
AB7 R13523 0 DDC_SDA_HDMI2 +3.3V_U_NORMAL
GPIO[76]
SW1351
AB6
1 2
X-TAL_1
GPIO[69]
AE21 C1354
R13555
PAD_GPIO10
R13524 33 XIN_URSA
GND_1
AC20
PAD_GPIO11 R13525 33 22 1uF R13577
AE12
PAD_GPIO12/[VX1_RX_HTPD_O] R13585
3 4 10V 10K
AD12 R13586
R13568
100K 100K
M4
PAD_GPIO13/[VX1_RX_HTPD_V]
AD18
URSA_RX_Vx1_HTPDn OPT
OPTR13513 33
GPIO[70] PAD_GPIO14
R13542 10K
SML-512UW
URSA_RESET
2
1
M5 AC11
LD1351
OPTR13514 33
24MHz
X1351
GPIO[72] PAD_GPIO15/[VX1_RX_LOCK_O] R13543 10K
N4 AC12
1M
R13515 33
OPT GPIO[73] PAD_GPIO16/[VX1_RX_LOCK_V] URSA_RX_Vx1_HTPDn
N5 AE18
OPTR13516 33 R13552
C1352
GPIO[71] PAD_GPIO17 10K
D1351 URSA_RESET_SoC
R13572
3
4
OPT
8pF
50V
R13556
FLASH_WP_URSA 1N4148W 0
B1 470K
X-TAL_2
GND_2
100V
220
NC_3
AG1 OPT R13578
NC_4 XO_URSA OPT
AE6 AH2
NC_1 NC_5 URSA_RESET_READY
AH27
AD6
NC_6
B28 E
0
Q1351
NC_2 NC_7
AG28 2N3906S-RTK
R13506
NC_8 OPT
B PNP_KEC(MULTI)
C
E Q1351-*1
MMBT3906(NXP)
B PNP_NXP(MULTI)
C
+3.3V_U_NORMAL
URSA Option
URSA_BIT0_1
LGD_Module
Div_BIT1_1
Div_BIT0_1
R13547 10K
R13548 10K
R13550 10K
R13553 10K
R13536 10K
R13544 10K
R13502 10K
R13530 10K
R13534 10K
R13526 10K
Release
R13532 10K
OPT
OPT
OPT
OPT
OPT
Chip Config Debugging for URSA
URSA_BIT1_1
URSA_BIT2_1
URSA_RX_LVDS
URSA_OPT_6 Debug/ISP ADDR
Slave (Debug Port:0XB4,ISP:0X98)
URSA_OPT_5
CHIP_CONF:{DIM2,DIM1,DIM0}
BIT [1/0] Module Division URSA_OPT_4 CHIP_CONF=3’d7:111:boot from SPI Flash I2C_S Port
0/0 Non Division Div_BIT0 P1351
Division Type
0/1 2 Division 12507WS-04L
Div_BIT1
WAFER-STRAIGHT
1/0 4 Division
URSA_OPT_0 URSA_DEBUG
1/1 8 Division Rx Interface SW1352
URSA_OPT_1
+3.3V_U_NORMAL DIM0 1
JS2235S
BIT [2/1/0] Tx Lane
URSA_BIT0 OPT 10K 2
URSA_BIT1 URSA_SCL 1 6 URSA_SDA
0/0/0 4K@120 (4DDR) 10K R13567 R13574 R13583
DIM1 R13571 33 0
0/0/1 4k@60 (2DDR) URSA_BIT2 R13563 3 SCL2_+3.3V_DB 0
URSA_MP URSA_MP
URSA_DEBUG 2 5 SDA2_+3.3V_URSA
SCL2_+3.3V_URSA
0/1/0 5k@120 (4DDR) URSA_BIT3 OPT 10K R13575 URSA_DEBUG R13584
R13570 33 0 0
0/1/1 OLED 4K (4DDR) 4 SDA2_+3.3V_DB OPT OPT
10K R13566 URSA_DEBUG
SCL2_+3.3V_DB
3 4 SDA2_+3.3V_DB
1/0/0 FHD@120 (4DDR)
R13561 DIM2 5
1/0/1 FHD@60 (2DDR)
OPT URSA_RX_Vx1
1/1/0 FHD@60 (4DDR) OPT 10K
URSA_BIT0_0
URSA_BIT1_0
URSA_BIT2_0
10K
R13554 10K
R13507 10K
R13545 10K
R13549 10K
Div_BIT1_0
Div_BIT0_0
R13537 10K
1/1/1 R13565
R13535 10K
4K@60Hz (4DDR) 10K
R13531 10K
R13533 10K
10K
OS_Module
R13527 10K
OPT
Debug
R13560
R13551
R13546
* URSA_BIT3 : READY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS URSA11P 2014.
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. U_UART_GPITO 132
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
VDDC VDDC
VDDC IC119 IC119
LGE5352(URSA11) LGE5352(URSA11)
C136001 C136002 C136099 C136100 C136009 C136022 C136032 C136042 C136049 C136055 C136061 C136066 C136068 C136109 C136110 C136111 C136069 C136070 C136071 N7 H1 C11
VDDC_1 GND_1 GND_73
10uF 10uF 10uF 10uF 10uF 10uF 10uF 1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 10uF 0.1uF 1uF 10uF N8
VDDC_2 GND_2
K1 G11
GND_74
10V 10V P7 A2 H11 C19
10V 10V 10V 10V 10V 10V 10V 10V 16V 16V 16V 16V 16V 16V 10V 10V 16V VDDC_3 GND_3 GND_75 GND_199
P8 B2 J11 D19
VDDC_4 GND_4 GND_76 GND_200
P9 G2 K11 E19
VDDC_5 GND_5 GND_77 GND_201
R5 J2 L11 F19
VDDC_6 GND_6 GND_78 GND_202
AVDDL_MOD 4th Layer R6
VDDC_7 GND_7
L2 M11
GND_79 GND_203
G19
R7 N2 N11 H19
VDDC_8 GND_8 GND_80 GND_204
L1366
Close to Chip side R8
R9
VDDC_9
VDDC_10
GND_9
GND_10
P2
W2
P11
R11
GND_81
GND_82
GND_205
GND_206
J19
K19
BLM18PG121SN1D T5 Y2 T11 L19
VDDC_11 GND_11 GND_83 GND_207
T6 AB2 U11 M19
VDDC_12 GND_12 GND_84 GND_208
T7 AC2 V11 N19
C136036 C136010 C136023 C136056 C136063 VDDC_13 GND_13 GND_85 GND_209
C136046 T8 AG2 W11 AB19
10uF 0.1uF 0.1uF 0.1uF 0.1uF T9
VDDC_14 GND_14
Y11
GND_86 GND_210
AH19
0.1uF VDDC_15 GND_87 GND_211
10V 16V 16V 16V 16V T10 AA11
OPT 16V VDDC_16 GND_88
U4 AB11
VDDC_17 GND_89
4th Layer U5 D3 C12 C20
VDDC_18 GND_15 GND_90 GND_212
U6 E3 G12 D20
VDDC_19 GND_16 GND_91 GND_213
U7 F3 H12 E20
AVDDL_DRV Close to Chip side AVDDL_DVI
U8
U9
VDDC_20
VDDC_21
GND_17
GND_18
T3
U3
N12
P12
GND_92
GND_93
GND_214
GND_215
F20
G20
VDDC_22 GND_19 GND_94 GND_216
U10 V3 R12 H20
VDDC_23 GND_20 GND_95 GND_217
L1367 Y3 T12 J20
BLM18PG121SN1D GND_21 GND_96 GND_218
M3 AE3 U12 K20
AVDDL_HDMIRX_1 GND_22 GND_97 GND_219
W6 AF3 V12 L20
AVDDL_HDMIRX_2 GND_23 GND_98 GND_220
C136033 C136011 C136024 C136047 W7 AG3 AB12 M20
C136057 C136064 AVDDL_HDMIRX_3 GND_24 GND_99 GND_221
10uF 0.1uF 0.1uF 0.1uF C136086 AVDDL_HDMITX W8 C13 N20
0.1uF 0.1uF AVDDL_HDMIRX_4
C4
GND_100 GND_222
10V 16V 16V 16V 0.1uF GND_25
OPT 16V 16V AB3 D13
16V AVDDL_HDMITX_4 GND_101
Y7 P4 E13
AVDDL_HDMITX_1 GND_26 GND_102
Y8 R4 F13 U20
4th Layer C136088 AVDDL_RX Y9
AVDDL_HDMITX_2 GND_27
T4 G13
GND_103 GND_223
V20
AVDDL_HDMITX_3 GND_28 GND_104 GND_224
0.1uF H13 AB20
DVDD_DDR Close to Chip side 16V W9
W10
AVDDL_LVDSRX/AVDDL_VBY1RX_1
J13
K13
GND_105
GND_106
GND_225
AVDDL_MOD AVDDL_LVDSRX/AVDDL_VBY1RX_2 GND_107
Y10 L13
L1368 AVDDL_LVDSRX/AVDDL_VBY1RX_3 GND_108
M13 A21
BLM18PG121SN1D GND_109 GND_226
J8 V4 N13 B21
AVDDL_MOD_1 GND_29 GND_110 GND_227
J9 W4 T13 C21
C136043 C136059 AVDDL_MOD_2 GND_30 GND_111 GND_228
C136012 C136025 C136034 C136050 C136107 C136108 C136065 J10 U13 D21
10uF 1uF AVDDL_DRV K8
AVDDL_MOD_3
AG4 V13
GND_112 GND_229
E21
0.1uF 0.1uF 10uF 0.1uF 1uF 0.1uF 0.1uF AVDDL_MOD_4 GND_31 GND_113 GND_230
10V 10V K9 W13 F21
16V 16V 10V 16V 10V 16V 16V AVDDL_MOD_5 GND_114 GND_231
OPT OPT K10 AB13 G21
AVDDL_PREDRV_1 GND_115 GND_232
L8 H21
AVDDL_PREDRV_2 GND_233
L9 D14 J21
AVDDL_PREDRV_3 GND_116 GND_234
4th Layer L10 P5 E14 K21
AVDDL_PREDRV_4 GND_32 GND_117 GND_235
DVDD_DDR M10 V5 F14 L21
AVDDL_PREDRV_5 GND_33 GND_118 GND_236
W5 G14 M21
GND_34 GND_119 GND_237
AVDDL_RX
Close to Chip side T16
U16
DVDD_DDR_1
DVDD_DDR_3
H14
J14
GND_120
GND_121
GND_238
GND_239
N21
P21
U17 K14 R21
L1372 DVDD_DDR_4 GND_122 GND_240
BLM18PG121SN1D T17 L14 T21
DVDD_DDR_2 GND_123 GND_241
B6 M14 U21
GND_35 GND_124 GND_242
K6 N14 V21
GND_36 GND_125 GND_243
C136013 C136026 C136030 C136105 C136051 +1.5V_U_DDR M6 T14 W21
GND_37 GND_126 GND_244
0.1uF 10uF 0.1uF 0.1uF N6 U14 Y21
0.1uF GND_38 GND_127 GND_245
P6 V14 AA21
16V 16V 10V 16V 16V GND_39 GND_128 GND_246
OPT P15 V6 W14 AB21
OPT AVDD_DDR0_1 GND_40 GND_129 GND_247
P16 AB14 AG21
AVDD_DDR0_2 GND_130 GND_248
P17 A7
4th Layer AVDD_DDR0_3 GND_41
R15 G7 B15
AVDD_DDR0_4 GND_42 GND_131
R16 H7 D15 A22
AVDDL_HDMITX Close to Chip side R17
AVDD_DDR0_5
AVDD_DDR0_6
GND_43
GND_44
J7 E15
GND_132
GND_133
GND_249
GND_250
B22
P19 K7 F15 C22
AVDD_DDR1_1 GND_45 GND_134 GND_251
P20 L7 G15 D22
L1369 AVDD_DDR1_2 GND_46 GND_135 GND_252
BLM18PG121SN1D R19 M7 H15 E22
AVDD_DDR1_3 GND_47 GND_136 GND_253
R20 V7 J15 F22
AVDD_DDR1_4 GND_48 GND_137 GND_254
T19 K15 G22
AVDD_DDR1_5 GND_138 GND_255
C136014 C136027 C136104 C136040 T20 L15 H22
AVDD_DDR1_6 GND_139 GND_256
0.1uF 10uF 0.1uF 0.1uF AVDD_15_MOD
M15
GND_140 GND_257
J22
NC FOR U11P
16V J12 B8 N15 K22
10V 16V 16V AVDD_15_MOD_1 GND_49 GND_141 GND_258
U11 ONLY
OPT K12 G8 T15 L22
OPT L12
AVDD_15_MOD_2 GND_50
H8 U15
GND_142 GND_259
M22
4th Layer M12
AVDD_15_MOD_3 GND_51
M8 V15
GND_143 GND_260
N22
AVDD_15_MOD_4 GND_52 GND_144 GND_261
V8 W15 P22
Close to Chip side AVDD_MOD
Y14
GND_53
GND_54
AA8
AB8
AB15
AF15
GND_145
GND_146
GND_262
GND_263
R22
T22
AVDD_MOD_1 GND_55 GND_147 GND_264
Y15 U22
AVDD_MOD_2 GND_265
AVDDL_DVI AA14 C16 V22
AVDD_MOD_3 GND_148 GND_266
AA15 A9 D16 W22
AVDD_MOD_4 GND_56 GND_149 GND_267
VDDP G9 E16 Y22
L1370 GND_57 GND_150 GND_268
BLM18PG121SN1D W20 H9 F16 AA22
VDDP_1 GND_58 GND_151 GND_269
Y20 M9 G16 AB22
VDDP_2 GND_59 GND_152 GND_270
AA20 N9 H16
VDDP_3 GND_60 GND_153
C136015 C136028 C136035 C136045 C136106 C136053 V9 J16 A23
AVDD_HDMITX GND_61 GND_154 GND_271
0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF GND_62
AA9 K16
GND_155 GND_272
B23
16V AC3 AB9 L16 C23
10V 16V 16V 16V 16V AVDD_HDMITX_1 GND_63 GND_156 GND_273
Y13 M16 D23
AVDD_DVI AVDD_HDMITX_2 GND_157 GND_274
AA13 N16 E23
4th Layer P3
AVDD_HDMITX_3
V16
GND_158 GND_275
F23
AVDD_HDMIRX_1 GND_159 GND_276
C136083 W12 B10 W16 Y23
Close to Chip side 0.1uF Y12
AA12
AVDD_HDMIRX_2
AVDD_HDMIRX_3
GND_64
GND_65
G10
H10
AB16
AC16
GND_160
GND_161
GND_277
GND_278
AA23
AB23
16V AVDD_HDMIRX_4 GND_66 GND_162 GND_279
AVDD_PLL N10 AD16 AH23
C136087 AA19
GND_67
P10 AE16
GND_163 GND_280
+3.3V_U_NORMAL
VDDP 0.1uF W19
AVDD_XTAL GND_68
R10 B17
GND_164
A24
16V AVDD_PLL_1 GND_69 GND_165 GND_281
Y19 V10 C17 B24
AVDD_PLL_2 GND_70 GND_166 GND_282
AA10 D17 C24
L1361 AVDD_ALLRX GND_71 GND_167 GND_283
BLM18PG121SN1D AB10 E17 D24
GND_72 GND_168 GND_284
Y16 F17 Y24
AVDD_LVDSRX/AVDD_VBY1RX_1 GND_169 GND_285
AA16 G17 AA24
AVDD_LVDSRX/AVDD_VBY1RX_2 GND_170 GND_286
AA17 H17 AB24
C136005 C136021 C136031 C136044 C136052 C136058 C136062 C136067 C136114 AVDD_LVDSRX/AVDD_VBY1RX_3 GND_171 GND_287
+1.5V_U_DDR J17
10uF 10uF 10uF 1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF K17
GND_172
C25
10V 10V 10V 10V 16V 16V 16V 16V 16V +1.5V_U_DDR L17
GND_173 GND_288
J25
C136084 0.1uF 16V C136089 0.47uF 6.3V GND_174 GND_289
A18 M17 M25
AVDD_DDR_VBP_A_1 GND_175 GND_290
B18 N17 R25
4th Layer 4th Layer C136090 0.22uF 16V OPT R13
AVDD_DDR_VBP_A_2
V17
GND_176 GND_291
V25
AVDD_DDR_VBP_A_3 C136097 0.1uF 16V GND_177 GND_292
R14 A20 W17 Y25
Close to Chip side C136091 0.47uF 6.3V A16
AVDD_DDR_VBP_A_4 DRAM_VDD_A_1
B20 Y17
GND_178 GND_293
AA25
U11 MIU POWER ONLY
AVDD_DDR_VBN_A_1 DRAM_VDD_A_2 GND_179 GND_294
B16 AB17 AB25
AVDD_PLL 4th Layer C136092 0.22uF 16V OPT AVDD_DDR_VBN_A_2 R136001 GND_180 GND_295
P13 AC17 AG25
AVDD_DDR_VBN_A_3 OPT 0 GND_181 GND_296
L1362 P14 AD17
POWER ONLY
AVDD_DDR_VBN_A_4 GND_182
U11P MIU
BLM18PG121SN1D A26 C136098 0.1uF 16V AG17
C136085 0.1uF 16V C136093 0.22uF 16V OPT DRAM_VDD_B_1 GND_183
U18 B26 C18 C26
AVDD_DDR_VBP_B_1 DRAM_VDD_B_2 OPT GND_184 GND_297
4th Layer U19 D18 E26
C136094 0.47uF 6.3V AVDD_DDR_VBP_B_2 GND_185 GND_298
C136004 C136016 Y27 E18 W26
C136113 AVDD_DDR_VBP_B_3 GND_186 GND_299
10uF 0.1uF 0.1uF C136095 0.22uF 16V OPT
Y28
V18
AVDD_DDR_VBP_B_4 Close to Chip F18
G18
GND_187 GND_300
Y26
AA26
10V 16V 16V AVDD_DDR_VBN_B_1 GND_188 GND_301
Close to Chip side 4th Layer
C136096 0.47uF 6.3V
V19
AB27
AVDD_DDR_VBN_B_2
AVDD_DDR_VBN_B_3
H18
J18
GND_189
GND_190
GND_302
GND_303
AB26
AE26
4th Layer AB28 K18
AVDD_DDR_VBN_B_4 GND_191
L18 A27
GND_192 GND_304
M18 B27
GND_193 GND_305
N18 C27
GND_194 GND_306
AA27
AVDD_MOD
Close to Chip side GND_307
GND_308
AG27
J28
L1363 GND_309
W18 M28
BLM18PG121SN1D GND_195 GND_310
Y18 R28
GND_196 GND_311
AA18 V28
GND_197 GND_312
AB18
C136003 C136017 C136029 C136041 C136048 C136054 C136060 GND_198
10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
10V
10V 10V 16V 16V 16V 16V
+1.5V_U_DDR
AVDD_DVI
L1364
C136072 C136073 C136075 C136076 C136078 C136080 C136081
BLM18PG121SN1D 10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF
10V 10V 10V 16V 16V 16V 16V
C136006 C136018 C136101 C136037
10uF 0.1uF 0.1uF 0.1uF
10V 16V 16V 16V
OPT OPT
4th Layer
Close to Chip side +1.5V_U_DDR AVDD_15_MOD
AVDD_HDMITX
L1365
BLM18PG121SN1D
L1373
0
C136007 C136019 C136102
C136038
10uF 0.1uF C136074 C136077
0.1uF 0.1uF C136079 C136112
10V 16V 10uF 0.1uF
16V 16V 0.1uF 0.1uF C136082
OPT 10V 16V
16V 16V 0.1uF
4th Layer OPT 16V
Close to Chip side 4th Layer
AVDD_ALLRX
L1371
BLM18PG121SN1D
Close to Chip side
C136008 C136020 C136103
C136039
10uF 0.1uF
0.1uF 0.1uF
10V 16V
16V 16V
OPT
4th Layer
Close to Chip side
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. U_Power 133
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
[51P Vx1
output wafer]
P13000
SP14-11592-01-51Pin +3.3V_U_NORMAL +3.3V_U_NORMAL
51
1
50
2 TXDAP7_L
49
3 TXDAN7_L R13039 R13049 IC119
48 +1.8V R13035 10K +1.8V R13047 10K LGE5352(URSA11)
4
10K LOCKAn 10K HTPDAn
47
5 TXDAP6_L R13038 C R13048 C
46 10K 10K
6 B Q13032 B Q13034 AH5
TXDAN6_L RXB0- PAD_RA0N
45 R13031 2N3904S R13043 2N3904S AG5
7 RXB0+ PAD_RA0P
10K NPN_KEC(MULTI) 10K NPN_KEC(MULTI) AF5
E E RXB1- PAD_RA1N
44 AG6
8 TXDAP5_L PAD_RA1P
C C C C RXB1+
43 R13032 R13046 AF6
9 RXB2- PAD_RA2N
TXDAN5_L 100 B Q13031 B Q13032-*1 100 B Q13033 B Q13034-*1 AG7
42 2N3904S MMBT3904(NXP) 2N3904S MMBT3904(NXP) RXB2+ PAD_RA2P
10 LOCKn_IN HTPDn_IN AH7
NPN_KEC(MULTI) NPN_NXP(MULTI) NPN_KEC(MULTI) NPN_NXP(MULTI) RXBCK- PAD_RACKN
41 E E E E AF7 L1
11 RXBCK+ PAD_RACKP PAD_A0P/VBY0-
TXDAP4_L C AH8 L3
40 RXB3- PAD_RA3N PAD_A0M/VBY0+
12 AG8 K2
TXDAN4_L C B Q13033-*1 RXB3+ PAD_RA3P PAD_A1P/VBY1-
39 MMBT3904(NXP) AF8 K3
13 B Q13031-*1 RXB4- PAD_RA4N PAD_A1M/VBY1+
AG9 J3
38
MMBT3904(NXP) E NPN_NXP(MULTI) RXB4+ PAD_RA4P PAD_A2P/VBY2-
14 NPN_NXP(MULTI) H2
TXDAP3_L E PAD_A2M/VBY2+
37 H3
15 PAD_ACKP/VBY3-
TXDAN3_L AF9 G1
36 RXA0- PAD_RB0N PAD_ACKM/VBY3+
16 AG10 G3 0.1uF C13008
RXA0+ PAD_RB0P PAD_A3P/VBY4- TXDAN0_L
35 AH10 F2 0.1uF C13009
17 RXA1- PAD_RB1N PAD_A3M/VBY4+ TXDAP0_L
TXDAP2_L AF10 E2 0.1uF C13010
34 RXA1+ PAD_RB1P PAD_A4P/VBY5- TXDAN1_L
18 AH11 E1 0.1uF C13011
TXDAN2_L +3.3V_U_NORMAL RXA2- PAD_RB2N PAD_A4M/VBY5+
L/D_EN(Pin30) AG11 D1 TXDAP1_L
33 PAD_RB2P
0.1uF C13012
19 RXA2+ PAD_B0P/VBY6- TXDAN2_L
R13034 - T-Con L/D Function AF11 D2 0.1uF C13013
32 HIGH : Enable RXACK- PAD_RBCKN PAD_B0M/VBY6+ TXDAP2_L
20 10K AG12 C2 0.1uF C13014
TXDAP1_L OPT LOW or NC : Disable RXACK+ PAD_RBCKP PAD_B1P/VBY7-
+3.3V_U_NORMAL AF12 C3 TXDAN3_L
31 *LGD_120Hz: T240 module (UB98/95,D9) 0.1uF C13015
G
21 R13037 0 RXA3- PAD_RB3N PAD_B1M/VBY7+
TXDAN1_L L_DIM_EN AG13 TXDAP3_L
30 LGD_Module RXA3+ PAD_RB3P
22 AH13
R13003 RXA4- PAD_RB4N
S
D
29 10K AF13 K5
R13007 RXA4+ PAD_RB4P PAD_MOD_GPIO0
23 TXDAP0_L OPT 10K Q13004-*1 K4
28 LGD_Module 2N7002K PAD_MOD_GPIO1
+3.3V_U_NORMAL TCON_I2C_FET_DIODES(MULTI) L5
24 TXDAN0_L PAD_B2P
27 L6
TCON_I2C_EN PAD_B2M
25 J6
R13004 R13018
PAD_BCKP
G
26 10K 4.7K H6
26 LOCKn_IN LGD/BOE_Module OPT PAD_BCKM
25 R13013 0 R13061 0 J5
27 URSA_SCL PAD_B3P
HTPDn_IN J4
S
D
24 R13011 0 OPT PAD_B3M
28 Q13004 G5
2N7002KA R1503 0 PAD_B4P
23 Non_INX_Module TCON_I2C_FET_KEC(MULTI) G4
29 R13055 IR_SCL PAD_B4M
TCON_I2C H5
22 PAD_C0P
30 33 OPT G6
PAD_C0M
21 OPT *Pin31(BIT_SEL) +3.3V_U_NORMAL
31 HIGH or NC : 10Bit
20 R13033 10K LOW : 8Bit
32 TCON_I2C_EN
R13019 B3
19 0.1uF C13016
G
33 4.7K PAD_E0P/VBY8- TXDAN4_L
OPT A3 0.1uF C13017
18 R13012 0 R13062 0 PAD_E0M/VBY8+ TXDAP4_L
34 A4 0.1uF C13018
URSA_SDA PAD_E1P/VBY9- TXDAN5_L
S
D
17 OPT *Pin35(PCID) OPT B4 0.1uF C13019
35 Q13005 PAD_E1M/VBY9+ TXDAP5_L
High:PCID enable 2N7002KA B5 0.1uF C13020
R13006 10K R1506 0 PAD_E2P/VBY10-
16 Low or NC : PCID diable TCON_I2C_FET_KEC(MULTI) AH14 C5 TXDAN6_L
36 IR_SDA 0.1uF C13021
R13059 TCON_I2C PADA_VBY1_RXM[0] PAD_E2M/VBY10+ TXDAP6_L
15 AG14 A6 0.1uF C13022
37 PADA_VBY1_RXP[0] PAD_ECKP/VBY11- TXDAN7_L
33 OPT AF14 C6 0.1uF C13023
14 R13005 0 PADA_VBY1_RXM[1] PAD_ECKM/VBY11+ TXDAP7_L
38 +3.3V_U_NORMAL AG15 B7
G
PADA_VBY1_RXP[1] PAD_E3P/VBY12-
13 LGD_120Hz AG16 C7
39 PADA_VBY1_RXM[2] PAD_E3M/VBY12+
AH16 C8
12 R13044 PADA_VBY1_RXP[2] PAD_E4P/VBY13-
S
D
40 AF16 B9
10K PADA_VBY1_RXM[3] PAD_E4M/VBY13+
Q13005-*1 AH17 C9
11 OPT 2N7002K
41 PADA_VBY1_RXP[3] PAD_F0P/VBY14-
R13016 0 TCON_I2C_FET_DIODES(MULTI) A10
10 Data_Format_1 PAD_F0M/VBY14+
42 AF17 C10
LGD_120Hz PADA_VBY1_RXM[4] PAD_F1P/VBY15-
9 AG18 B11
43 PADA_VBY1_RXP[4] PAD_F1M/VBY15+
R13009 R13010 AF18 B12
8 0 0 PADA_VBY1_RXM[5] PAD_MOD_GPIO8/VBY16-
44 AG19 A12
R13045 PADA_VBY1_RXP[5] PAD_MOD_GPIO9/VBY16+
7 10K Data Input Format[1:0] AF19 A13
45 PADA_VBY1_RXM[6] PAD_F2P/VBY17-
LGD_120Hz AH20 B13
6 *Mode 3 (4 Division) PADA_VBY1_RXP[6] PAD_F2M/VBY17+
46 AG20 B14
- Data Format 0(Pin37) = Low PADA_VBY1_RXM[7] PAD_FCKP/VBY18-
5 Data Format 1(Pin36) = High AF20 C14
47 PADA_VBY1_RXP[7] PAD_FCKM/VBY18+
+3.3V_U_NORMAL A15
4 *Mode 2 (2 Division) PAD_F3P/VBY19-
48 - Data Format 0(Pin37) = High AF21 C15
PANEL_VCC PADA_VBY1_RXM[8] PAD_F3M/VBY19+
3 Data Format 1(Pin36) = Low AG22
49 PADA_VBY1_RXP[8]
R13040 AH22
2 10K PADA_VBY1_RXM[9]
50 AF22 E9
OPT PADA_VBY1_RXP[9] PAD_F4P
1 AG23 D9
51 R13015 0 PADA_VBY1_RXM[10] PAD_F4M
AF23 F8
Data_Format_0 PADA_VBY1_RXP[10] PAD_G0P
L13000 LGD_120Hz AG24 F9
52 MLB-201209-0120P-N2 PADA_VBY1_RXM[11] PAD_G0M
AF24
PADA_VBY1_RXP[11]
C13033
U11 ONLY, NC FOR U11P
. C13032 10uF R13041
10K AH25
10uF 16V LGD_120Hz PADA_VBY1_RXM[12]
AF25
16V
RESERVED FOR U11P TEST
PADA_VBY1_RXP[12]
AG26 F10
PADA_VBY1_RXM[13] PAD_E0P/[TEST]
AF26 E11
PADA_VBY1_RXP[13] PAD_E0M/[TEST]
AF27 E10
PADA_VBY1_RXM[14] PAD_E1P
AF28 D10
PADA_VBY1_RXP[14] PAD_E1M
AE27 E12
PADA_VBY1_RXM[15] PAD_E2P/[TEST]
AE28 D12
PADA_VBY1_RXP[15] PAD_E2M
F11
PAD_ECKP/[TEST]
F12
+1.8V PAD_ECKM
+3.3V_U_NORMAL
IC13000
AZ1117EH-ADJTRG1
IN OUT
ADJ/GND
75
R13036
C13034 C13035
33
R13042
10uF 10uF
10V 10V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 130
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
IC119
LGE5352(URSA11)
E24
PAD_IO[78]/B-A0/[CD-A0]
G27
PAD_IO[89]/B-A1/[CD-A1]
F25
PAD_IO[80]/B-A2/[CD-A2]
G23
PAD_IO[75]/B-A3/[CD-A3]
G26
PAD_IO[86]/B-A4/[CD-A4]
F24
PAD_IO[74]/B-A5/[CD-A5]
G28
PAD_IO[96]/B-A6/[CD-A6]
E27 +1.5V_U_DDR
PAD_IO[87]/B-A7/[CD-A7]
F28
PAD_IO[92]/B-A8/[CD-A8]
D26 +1.5V_U_DDR A-MVREFDQ_U
PAD_IO[73]/B-A9/[CD-A9]
H26
PAD_IO[90]/B-A10/[CD-A10]
F26
PAD_IO[83]/B-A11/[CD-A11]
H25
PAD_IO[84]/B-A12/[CD-A12]
D27 OPT OPT OPT OPT OPT OPT OPT OPT OPT OPT
PAD_IO[77]/B-A13/[CD-A13]
F27 R1383 C13805 C13808 C13811 C13813 C13815 C13817 C13819 C13821 C13823 C13825
PAD_IO[82]/B-A14/[CD-A14]
J24 1K
PAD_IO[88]/B-A15/[CD-A15] 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
H24 1%
PAD_IO[85]/B-BA0/[CD-BA0]
H27
PAD_IO[93]/B-BA1/[CD-BA1]
G24
PAD_IO[81]/B-BA2/[CD-BA2]
K24 R1384 C13801 C13803
PAD_IO[97]/B-RASZ/[CD-RASZ]
PAD_IO[94]/B-CASZ/[CD-CASZ]
PAD_IO[79]/B-WEZ/[CD-WEZ]
K23
H23
1K
1%
0.1uF 1000pF Close to DDR POWER PIN
J23
PAD_IO[95]/B-ODT/[CD-ODT]
J27
PAD_IO[91]/B-CKE/[CD-CKE]
D28
PAD_IO[76]/B-RST/[CD-RST]
K28
PAD_IO[101]/B-MCLK/[CD-MCLK]
MIU1 (U11 ONLY)
J26
PAD_IO[100]/B-MCLKZ/[CD-MCLKZ]
D25
PAD_IO[99]/B-CSB1/[C-CSB1]
C28 +1.5V_U_DDR
PAD_IO[98]/B-CSB2/[D-CSB2]
N27 +1.5V_U_DDR
PAD_IO[121]/B-DQ[0]/[C-DQL0] B-MVREFDQ_U
L26
PAD_IO[103]/B-DQ[1]/[C-DQL1]
N26
PAD_IO[120]/B-DQ[2]/[C-DQL2]
L27
PAD_IO[104]/B-DQ[3]/[C-DQL3]
P26
PAD_IO[123]/B-DQ[4]/[C-DQL4]
K27 OPT OPT OPT OPT OPT OPT OPT OPT OPT OPT
PAD_IO[102]/B-DQ[5]/[C-DQL5] R1385 C13806 C13809 C13812 C13814 C13816 C13818 C13820 C13822 C13824 C13826
P27
PAD_IO[122]/B-DQ[6]/[C-DQL6] 1K
K26 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
PAD_IO[105]/B-DQ[7]/[C-DQL7] 1%
L23 OPT
PAD_IO[110]/B-DQ[8]/[C-DQU0]
P25
PAD_IO[117]/B-DQ[9]/[C-DQU1]
L24
PAD_IO[107]/B-DQ[10]/[C-DQU2]
P23
PAD_IO[119]/B-DQ[11]/[C-DQU3]
M24 R1386 C13802 C13804
PAD_IO[111]/B-DQ[12]/[C-DQU4]
PAD_IO[118]/B-DQ[13]/[C-DQU5]
R24
L25
1K
1%
0.1uF
OPT
1000pF
OPT
Close to DDR POWER PIN
PAD_IO[109]/B-DQ[14]/[C-DQU6]
P24 OPT
PAD_IO[116]/B-DQ[15]/[C-DQU7]
A-MVREFDQ_U M27
PAD_IO[106]/B-DQM[0]/[C-DML]
N24
PAD_IO[108]/B-DQM[1]/[C-DMU]
N28
PAD_IO[115]/B-DQS[0]/[C-DQSL]
B19 M26
DRAM_VREF_A PAD_IO[114]/B-DQSB[0]/[C-DQSLB]
N23 +1.5V_U_DDR
240 R1381 PAD_IO[113]/B-DQS[1]/[C-DQSU]
A19 M23
DRAM_ZQ_A PAD_IO[112]/B-DQSB[1]/[C-DQSUB]
1%
V27
PAD_IO[143]/B-DQ[16]/[D-DQL0]
T27
PAD_IO[126]/B-DQ[17]/[D-DQL1]
V26
PAD_IO[142]/B-DQ[18]/[D-DQL2]
T28 OPT OPT
PAD_IO[127]/B-DQ[19]/[D-DQL3]
W27 C13807 C13810
PAD_IO[144]/B-DQ[20]/[D-DQL4]
R27
PAD_IO[125]/B-DQ[21]/[D-DQL5] 0.1uF 0.1uF
W28
PAD_IO[145]/B-DQ[22]/[D-DQL6]
R26
PAD_IO[124]/B-DQ[23]/[D-DQL7]
U24
PAD_IO[129]/B-DQ[24]/[D-DQU0]
W23
PAD_IO[141]/B-DQ[25]/[D-DQU1]
R23
PAD_IO[139]_/B-DQ[26]/[D-DQU2]
W25
PAD_IO[138]/B-DQ[27]/[D-DQU3]
NPAD_IO[130]/B-DQ[28]/[D-DQU4]
T24
W24
Close to DDR POWER PIN
PAD_IO[133]/B-DQ[29]/[D-DQU5]
T23
PAD_IO[132]/B-DQ[30]/[D-DQU6]
V23
PAD_IO[140]/B-DQ[31]/[D-DQU7]
T26
PAD_IO[128]/B-DQM[2]/[D-DML]
U23
PAD_IO[131]/B-DQM[3]/[D-DMU]
U26
PAD_IO[137]/B-DQS[2]/[D-DQSL]
U27
PAD_IO[136]/B-DQSB[2]/[D-DQSLB]
V24
PAD_IO[135]/B-DQS[3]/[D-DQSU]
U25
PAD_IO[134]/B-DQSB[3]/[D-DQSUB] B-MVREFDQ_U
B25
DRAM_VREF_B
A25 R1382 240
DRAM_ZQ_B
1%
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
5V_HDMI_1 +5V_NORMAL
5V_HDMI_1 5V_HDMI_2 +5V_NORMAL
5V_HDMI_1
IC119
A1
A2
A1
A2
A1
A2
A1
A2
D1397 R1393 R1403 +5V_DDC_1 +5V_DDC_2 LGE5352(URSA11)
1K 1.8K KDS184 KDS184
OPT MMBD6100 MMBD6100
D1395 D1396 D1396-*1
R1399 D1395-*1
C
C
C
C
4.7K 5V_DET_HDMI_1
C C DDC_DIODE_KEC(MULTI) DDC_DIODE_KEC(MULTI)
Q1391 R1395 Q1391-*1 DDC_DIODE_SUZHOU(MULTI) DDC_DIODE_SUZHOU(MULTI) HDMI2_CLK+ N3
B 1K B R1416 2.2 PAD_RXCP_P0
2N3904S HDMI_HPD_1 MMBT3904(NXP) R1404 HDMI2_CLK- M2
3.3K R1417 2.2 PAD_RXCN_P0
D1399 R1391 NPN_NXP(MULTI) HDMI2_RX0+ P1
100K R1400 +5V_DDC_1 +5V_DDC_2 R1418 2.2 PAD_RX0P_P0
OPT E E HDMI2_RX0- N1
NPN_KEC(MULTI) 4.7K R1419 2.2 PAD_RX0N_P0
HDMI2_RX1+ R2
SHIELD OPT PAD_RX1P_P0
R1420 2.2 R3
HDMI2_RX1-
AR1391 R1421 2.2 PAD_RX1N_P0
T1
AR1393
AR1394
20 33 HDMI2_RX2+
PAD_RX2P_P0
1/16W
1/16W
R1422 2.2 T2
3.3K
3.3K
1/16W HDMI2_RX2-
R1423 2.2 PAD_RX2N_P0
19 DDC_SDA_HDMI1_JACK
HPD
DDC_SCL_HDMI1_JACK
18 DDC_SDA_HDMI1 DDC_SDA_HDMI2
+5V_POWER
17 C1391 C1393 DDC_SCL_HDMI1 DDC_SCL_HDMI2
DDC/CEC_GND D1401 D1403 0.1uF 0.1uF U2
OPT HDMI1_CLK+
16 OPT OPT OPT R1424 2.2 PAD_RXCP_P1
HDMI1_CLK- U1
SDA PAD_RXCN_P1
R1425 2.2 W3
15 HDMI1_RX0+
SCL R1397 0 R1426 2.2 PAD_RX0P_P1
HDMI_ARC HDMI1_RX0- V2
14 R1427 2.2 PAD_RX0N_P1
OPT HDMI1_RX1+ Y1
NC PAD_RX1P_P1
CEC_REMOTE R1407 R1428 2.2 W1
13 100 HDMI1_RX1-
PAD_RX1N_P1
CEC D1391 CEC_REMOTE CEC_REMOTE_S7 HDMI1_RX2+
R1429 2.2 AA2
12 R1446 2.2 PAD_RX2P_P1
CLK- IP4294CZ10-TBR HDMI1_RX2- AA3
PAD_RX2N_P1
R1447 2.2
11
CLK_SHIELD 1 10
10 HDMI1_CLK- AA6
CLK+ 2 9 NC_9
9 HDMI1_CLK+
DATA0- 3 8
8 OPT
DATA0_SHIELD 4 7
7
DATA0+ 5 6
HDMI1_RX0- During EDID downloading AF4
PAD_HDMI_SCL_P0/[TX]
6 HDMI1_RX0+
5
DATA1-
disconnect Jack DDC HDMI_RX2-
AE4
AC1
PAD_HDMI_SDA_P0/[TX]
PAD_TXCP_P0
DATA1_SHIELD AB1
D1392 HDMI_RX2+ PAD_TXCN_P0
4 AD2
DATA1+ IP4294CZ10-TBR HDMI_RX1- PAD_TX0P_P0
AD3
3 1 10 DDC1_EN HDMI_RX1+ PAD_TX0N_P0
DATA2- HDMI1_RX1- +5V_DDC_1 AE1
HDMI_RX0- PAD_TX1P_P0
2 2 9 AE2
DATA2_SHIELD HDMI1_RX1+ HDMI_RX0+ PAD_TX1N_P0
AF2
1 3 8 R1438 HDMI_CLK- PAD_TX2P_P0
DATA2+ AF1
OPT HDMI_CLK+ PAD_TX2N_P0
4 7 47K
G
HDMI1_RX2-
YKF45-7058V 5 6
HDMI1_RX2+ DDC_SDA_HDMI1_JACK DDC_SDA_HDMI1
S
D
JK1391
Q1399
2N7002KA
During EDID downloading
+5V_DDC_1
DDC1_EN connect DDC to M1A
5V_HDMI_2
5V_HDMI_2 R1430 0
R1439 EEPROM_EDID_Atmel(MULTI) +5V_DDC_1
47K DDC_DL_EN
G
IC1391
AT24C02C-SSHM-T R1408 DDC1_EN
D1398 R1394 R1405 DDC_SCL_HDMI1_JACK DDC_SCL_HDMI1
G
S
D
1K 1.8K 0
OPT
Q1400 R1431 0
R1401 2N7002KA A0 VCC R1409
1 8 DDC1_DL_SCL
4.7K 5V_DET_HDMI_2
D
S
C C 10K OPT
Q1392 R1396 Q1392-*1 Q1393
2N3904S B 1K MMBT3904(NXP) B R1406 A1 WP 2N7002KA
HDMI_HPD_2 2 7
R1392 3.3K
D1400 NPN_NXP(MULTI)
OPT 100K R1402 R1410
E E A2 SCL 22
NPN_KEC(MULTI) 4.7K 3 6
OPT DDC_SCL_HDMI1
SHIELD
DDC2_EN R1411
AR1392 +5V_DDC_2 GND SDA 22
20 33 4 5 DDC_SDA_HDMI1
1/16W
19 DDC_SDA_HDMI2_JACK R1440
HPD
47K
G
DDC_SCL_HDMI2_JACK
18 2N7002KA
+5V_POWER Q1394
D
S
17 C1392 C1394 DDC_SDA_HDMI2_JACK DDC_SDA_HDMI2
DDC/CEC_GND D1404 0.1uF DDC1_DL_SDA
S
D
D1402 0.1uF
OPT OPT OPT OPT R1432 0
16 Q1401
SDA 2N7002KA
G
15
SCL R1398 0
HDMI_ARC
14 R1433 0
NC OPT
DDC_DL_EN
CEC_REMOTE
13
CEC D1393
12 IP4294CZ10-TBR
CLK- DDC2_EN
+5V_DDC_2
11
CLK_SHIELD 1 10
10 HDMI2_CLK-
CLK+ 2 9 R1441
47K R1434 0
G
9 HDMI2_CLK+ EEPROM_EDID_Atmel(MULTI) +5V_DDC_2
DATA0- 3 8 DDC_DL_EN
8 OPT IC1392
DATA0_SHIELD 4 7 DDC_SCL_HDMI2_JACK DDC_SCL_HDMI2 AT24C02C-SSHM-T R1414 DDC2_EN
S
D
7 HDMI2_RX0-
G
DATA0+ 5 6 Q1402
2N7002KA 0
6 HDMI2_RX0+ R1435 0
DATA1- A0 VCC R1415
1 8 DDC2_DL_SCL
5
D
S
DATA1_SHIELD 10K OPT
D1394 Q1395
2N7002KA
4 A1 WP
DATA1+ IP4294CZ10-TBR 2 7
3 1 10 R1412
DATA2- HDMI2_RX1- +5V_DDC_1 A2 SCL 22
2 2 9 3 6
DDC_SCL_HDMI2
DATA2_SHIELD HDMI2_RX1+
1 3 8 GND SDA
R1413
DATA2+ 22
OPT R1442 4 5 DDC_SDA_HDMI2
4 7 1K
HDMI2_RX2-
YKF45-7058V 5 6 DDC1_EN
HDMI2_RX2+
JK1392
C C 2N7002KA
Q1396
Q1397 Q1397-*1
D
S
R1444 10K
2N3904S B MMBT3904(NXP) B DDC2_DL_SDA
DDC_DL_EN
NPN_NXP(MULTI) R1436 0
E E
G
NPN_KEC(MULTI)
R1437 0
DDC_DL_EN
EEPROM_EDID_Rohm(MULTI) EEPROM_EDID_Rohm(MULTI)
IC1391-*1 IC1392-*1
+5V_DDC_2 BR24G02FJ-3GTE2 BR24G02FJ-3GTE2
A0 VCC A0 VCC
R1443 1 8 1 8
1K
A1 WP A1 WP
DDC2_EN 2 7 2 7
C C
Q1398 Q1398-*1 A2 SCL A2 SCL
R1445 10K 3 6 3 6
2N3904S B MMBT3904(NXP) B
DDC_DL_EN
NPN_NXP(MULTI)
GND SDA GND SDA
E E 4 5 4 5
NPN_KEC(MULTI)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
T-con power
SMD bottom Gasket 10.5T
SMD_GASKET SMD_GASKET SMD_GASKET SMD_GASKET SMD_GASKET SMD_GASKET
GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H
M13000 M13001 M13002 M13003 M13004 M13005
MDS62110225 MDS62110225 MDS62110225 MDS62110225 MDS62110225 MDS62110225
SMD_GASKET SMD_GASKET SMD_GASKET SMD_GASKET SMD_GASKET
GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H GASKET_8.0X6.0X10.5H
M13006 M13007 M13008 M13009 M13010
MDS62110225 MDS62110225 MDS62110225 MDS62110225 MDS62110225
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_URSA9_UD 2014.04.24
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
T-CON POWER 141
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Trouble Shooting Guide
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Contents of Standard Repair Process
No. Error symptom (High category) Error symptom (Mid category) Page Remarks
1 No video/Normal audio 1
2 No video/No audio 2
3 A. Video error Tuning fail, Picture broken/ Freezing 3, 4
4 Color error 5
Vertical/Horizontal bar, residual image, light
5 6
spot, external device color error
6 No power 7
B. Power error Off when on, off while viewing, power auto
7 8
on/off
8 No audio/Normal video 9
C. Audio error
9 Wrecked audio/discontinuation/noise 10
10 Remote control & Local switch checking 11
D. Function error
11 External device recognition error 12
12 E. Noise Circuit noise, mechanical noise 13
13 F. Exterior error Exterior defect 14
* First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date
symptom
No video/ Normal audio Revised date 1/14
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
☞A4
☞A1
Y Y Check Power Y
No video Normal Check Back Light Normal Replace T-con
On Board
Normal audio Audio On with naked eye Voltage Board or module
3.5V, 12V, 24V etc.
N N N
☞A2
Move to Check Power Board LED B+ voltage Repair Power
No video/No (LED B+ voltage depends on the Power BD spec) Board or parts
audio
Y
Normal Replace Inverter
Voltage or module
N
End
Repair Power
Board or parts
※Precaution ☞A6 & A3
Always check & record S/W Version and White
Replace Main Board Re-enter White Balance value
Balance value before replacing the Main Board
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date
symptom
No video/ No audio Revised date 2/14
☞A4
Check various Check and
No Video/ Normal Y
voltages of Power replace
No audio Voltage
Board ( 3.5V,12V, 24V) MAIN B/D
N End
Replace Power
Board and repair
parts
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date
symptom
Picture broken/ Freezing Revised date 3/14
. By using Digital signal level meter
☞ A5
. By using Diagnostics menu on OSD
Check RF Signal level ( Menu→ Setup→ Cutomer Support → Signal Test )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Y Check whether other equipments have problem or not.
Normal
(By connecting RF Cable at other equipment)
Signal
→ DVD Player ,Set-Top-Box, Different maker TV etc`
N
Check RF Cable
☞ A6
Connection Normal Y Check SVC N Check Normal Y
End
1. Reconnection Picture S/W Version Bulletin Tuner soldering Picture
2. Install Booster
N Y N
Normal N Contact with signal distributor S/W Upgrade Replace
Picture or broadcaster (Cable or Air) Main B/D
Y
Normal N
End
Picture
Y
End
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date
symptom
Tuning fail, Picture broken/ Freezing Revised date 4/14
☞ A5 Check RF signal cable (DVB satellite signal or not)
Check whether other equipments have problem or not.
Check RF Signal level
(By connecting RF Cable at other equipment)
→ Set-Top-Box, Different maker TV etc
Check satellite setting. ☞ A6
- Check LNB frequency.
Normal Y Normal Y Check SVC N Check Replace
- Check satellite
Signal Setting S/W Version Bulletin Tuner soldering Main B/D
- Check Satellite connection
(DiSEqC, motor, etc…) Y
N N
Contact with signal Change satellite setting S/W Upgrade
distributor (match with installed ANT)
or broadcaster
(Cable or Air)
Normal N Normal N
Picture Picture
End Y Y
End End
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date
symptom
Color error Revised date 5/14
☞A7 ☞ A8/ A9
Check color by input ※ Check and
-External Input Y replace Link Y Y
Color Color Color
-COMPONENT Cable(LVDS) Replace Main B/D Replace module
error error error
-RGB and contact
-HDMI/DVI N condition N N
Check error End
color input
mode
☞A10 External Check
External
Input/Co external Y
Check Test pattern device/Cable Replace Main B/D
mponent device and
Normal
error cable
N
Request
repair for external
device/cable
N
Check external External Y
HDMI
device and device/Cable Replace Main B/D
error
cable Normal
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
A. Video error Established
Error date
symptom Vertical / Horizontal bar, residual image,
light spot, external device color error Revised date 6/14
Vertical/Horizontal bar, residual image, light spot Replace
Module
☞A7
☞ A8/ A9 N
Check color condition by input Check external
Check and
-External Input Screen Y device Screen Y Screen N Screen
replace Link Replace Main B/D
-Component/AV normal connection normal normal normal
Cable
-HDMI condition
N N Y Y
☞A10 Replace Request repair End End
module for external
Check Test pattern
device
External device screen error-Color error
Connect other external
Check screen
device and cable
condition by input
External (Check normal operation of
Check N -External Input Screen N Replace
Check S/W Version Input External Input, Component
Version -Component normal Main B/D
error and HDMI by connecting
-RGB
Y Jig, pattern Generator,
-HDMI/DVI Y
Set-top Box etc.
Compo
S/W Upgrade nent
error
Request repair for
external device
Normal N Connect other external
Screen device and cable Y
(Check normal operation
Y HDMI of External Input, Screen N Replace
error Component, HDMI by normal Main B/D
connecting Jig, pattern
End Generator ,Set-top Box
etc.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error B. Power error date
symptom
No power Revised date 7/14
☞A11 ☞A13
DC Power on Normal Replace
Check Power Y N Check Power Y
by pressing Power Key Operati OK Power
Power LED LED On On ‘”High”
On Remote control on B/D
Stand-By : Red N Y
Replace Main B/D
Check Power cord
was inserted properly
☞A4
Measure voltage of each output of Power B/D
N
Normal Y
☞A12
※ Normal Normal Y
Y Check ST-BY 3.5V Replace Main B/D
Voltage Voltage
N N
End
Replace Power B/D Replace Power B/D
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error B. Power error date
symptom
Off when on, off while viewing, power auto on/off Revised date 8/14
Check outlet
☞A14
CPU Y
N Check Power Off
Check A/C cord Error Abnorm Replace Main B/D Normal End
Mode
al
Y N
Check for all 3- phase Abnorm
power out al1 Replace Power B/D
☞A13
Fix A/C cord & Outlet (If Power Off mode
and check each 3 is not displayed) Normal Y
Replace Main B/D
phase out Check Power B/D Voltage
voltage
N
※ Caution
Check and fix exterior Replace Power B/D
of Power B/D Part
* Please refer to the all cases which Status Power off List Explanation
can be displayed on power off mode. "POWEROFF_REMOTEKEY" Power off by REMOTE CONTROL
"POWEROFF_OFFTIMER" Power off by OFF TIMER
"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER
"POWEROFF_INSTOP" Power off by INSTOP KEY
"POWEROFF_AUTOOFF" Power off by AUTO OFF
Normal "POWEROFF_ONTIMER" Power off by ON TIMER
"POWEROFF_RS232C" Power off by RS232C
"POWEROFF_RESREC" Power off by Reservated Record
"POWEROFF_RECEND" Power off by End of Recording
"POWEROFF_SWDOWN" Power off by S/W Download
"POWEROFF_UNKNOWN" Power off by unknown status except listed case
"POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble
Abnormal
"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
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Standard Repair Process
Established
Error C. Audio error date
symptom
No audio/ Normal video Revised date 9/14
☞A15 ☞A16
Check user Check audio B+
No audio N Normal Y
menu Off 24V of Power
Screen normal Voltage
Speaker off Board
Y N
Cancel OFF Replace Power Board and repair parts
Check
Disconn N
Speaker Replace MAIN Board End
ection
disconnection
Y
Replace Speaker
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error C. Audio error date
symptom
Wrecked audio/ discontinuation/noise Revised date 10/14
→ abnormal audio/discontinuation/noise is same after “Check input signal” compared to No audio
Check input ☞A16
signal Y Wrecked Audio/ Check and replace
Signal Check audio
-RF Discontinuation/ speaker and
Normal B+ Voltage (24V)
-External Input Noise for all audio connector
signal
N
Wrecked Audio/ Y
Normal
Discontinuation/ Replace Main B/D
Voltage
Noise only for D-TV
N
Wrecked Audio/
Discontinuation/ Replace Power B/D
Noise only for Analog
Wrecked Audio/
Connect and check
Discontinuation/
other external Replace Main B/D End
Noise only for
device
External Input
(When RF signal is not
received) N
Normal
Request repair to external Audio
cable/ANT provider
Y
(In case of
External Input
signal error) Check and fix external device
Check and fix
external device
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
D. Function error Established
Error date
symptom
Remote control & Local switch checking Revised date 11/14
1. Remote control(R/C) operating error
Replace
Main B/D
☞A17 Y
☞A17 ☞A17
Y Check & Repair
Check R/C itself Normal Normal N Check B+ 3.5V Normal Y Check IR Normal
Cable connection
Operation Operating Operating On Main B/D Voltage Output signal Signal
Connector solder
N Y N N
☞A4
Check R/C Operating Check & Replace Check 3.5v on Power B/D Repair/Replace
End
When turn off light Baterry of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D don’t have problem)
If R/C operate, Normal Y
Explain the customer End
Operating
cause is interference
from light in room. N
Replace R/C
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
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Standard Repair Process
Established
Error D. Function error date
symptom
External device recognition error Revised date 12/14
Check technical External Input
Check Y N
Signal information Technical and Component
input Replace Main B/D
Input - Fix information information Recognition error
signal
- S/W Version
N Y
Fix in
Check and fix accordance HDMI, Optical
with technical Recognition Replace Main B/D
external device/cable
information error
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error E. Noise date
symptom
Circuit noise, mechanical noise Revised date 13/14
Replace LPB(with LED driver)
Identify Circuit Check location OR
nose type noise of noise
Replace LED driver
Mechanical Check location of
noise noise
※ Mechanical noise is a natural ※ When the nose is severe, replace the module
phenomenon, and apply the 1st level (For models with fix information, upgrade the S/W or
description. When the customer does not provide the description)
agree, apply the process by stage.
OR
※ Describe the basis of the description in ※ If there is a “Tak Tak” noise from the cabinet,
“Part related to nose” in the Owner’s Manual. refer to the KMS fix information and then proceed
as shown in the solution manual
(For models without any fix information, provide
the description)
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error F. Exterior defect date
symptom
Exterior defect Revised date 14/14
Zoom part with Module
Replace module
exterior damage damage
Cabinet
Replace cabinet
damage
Remote
control Replace remote control
damage
Stand
Replace stand
damage
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Contents of Standard Repair Process Detail Technical Manual
No. Error symptom Content Page Remarks
1 Check LCD back light with naked eye A1
2 LED driver B+ measuring method A2
A. Video error_ No video/Normal audio
3 Check White Balance value A3
4 Power Board voltage measuring method A4
5 TUNER input signal strength checking method A5
A. Video error_ No video/Video lag/stop
6 TV Version checking method A6
7 Connection diagram A7
8 Check Link Cable (LVDS) reconnection A8
A. Video error_Color error
condition A9
9
10 Adjustment Test pattern - ADJ Key A10
11 Connection diagram A8
A. Video error_Vertical/Horizontal bar, Check Link Cable (LVDS) reconnection A8
12
residual image, light spot condition A9
13 Adjustment Test pattern - ADJ Key A10
14 Exchange T-Con Board (1) A-1/5
15 Exchange T-Con Board (2) A-2/5
Defected Type caused by T-Con/ 55” : driver board
16 Exchange LED driver Board (PSU) A-3/5
Inverter/ Module Other : PSU
17 Exchange Module itself (1) A-4/5
18 Exchange Module itself (2) A-5/5
Continue to the next page
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Contents of Standard Repair Process Detail Technical Manual
Continued from previous page
No. Error symptom Content Page Remarks
19 Check front display LED A11
20 Check power input Voltage & ST-BY 3.5V A12
B. Power error_No power
21 Checking method when power is ON A13
22 POWER BOARD voltage measuring method A4
B. Power error_Off when on, off while
23 POWER OFF MODE checking method A14
viewing
Checking method in menu when there is no
24 A15
audio
C. Audio error_No audio/Normal video
Voltage and speaker checking method when
25 A16
there is no audio
C. Audio error_Wrecked Voltage and speaker checking method in
26 A16
audio/discontinuation case of audio error
D. Function error_ No response in
27 Remote control operation checking method A17
remote control, key error
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
Revised
Content Check Back Light On with naked eye date A1
After turning on the power and disassembling the case, check with the naked eye, whether
you can see light from module holes.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
Revised
Content LED driver B+ measuring method date A2
Check the Voltage between LED+ / LED
The voltage spec is in Power B/D Spec sheet
Refer the Power B/D Spec sheet
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
Revised
Content Check White Balance value date A3
Entry method
1. Press the ADJ button on the remote control for adjustment.
2. Enter into White Balance of item 7.
3. After recording the R, G, B (GAIN, Cut) value of Color Temp (Cool/Medium/Warm), re-
enter the value after replacing the MAIN BOARD.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/ Audio date
Revised
Content Power Board voltage measuring method date A4
Check DC 3.5V, 12V, 24V
28 Pin (Power Board ↔ Main Board)
SMAW200-H28S5K
1 PWR_ON 2 DRV ON
3 P-DIM 4 P-DIM2
5 3.5V 6 GND
7 3.5V 8 3.5V
9 GND 10 GND
11 12V 12 12V
13 12V 14 12V
15 12V 16 GND
17 GND 18 24V
19 24V 20 24V
21 24V 22 GND
23 GND 24 N.C
25 SCLK 26 GND
27 SIN 28 VSYNC
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_Video error, video lag/stop date
TUNER input signal strength checking method Revised
Content date A5
MENU => Press red key Remote control=>signal test
=> Select channel
When the signal is strong, use the
attenuator (-10dB, -15dB, -20dB etc.)
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_Video error, video lag/stop date
TV Version checking method Revised
Content date A6
1. Checking method for remote control for adjustment
Version
Press the IN-START with the remote
control for adjustment
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error A. Video error _Vertical/Horizontal bar, residual Established
symptom image, light spot date
Revised
Content Connection diagram (1) date A7
As the part connecting to the external input, check the
screen condition by signal
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom
A. Video error_Color error
date
Revised
Content Check and replace Link Cable(LVDS) and contact condition date A8/A9
Check the contact condition of the Link Cable, especially dust or mis insertion
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom
A. Video error_Color error
date
Adjustment Test pattern - ADJ Key Revised
Content date A10
You can view 6 types of patterns using the ADJ Key
Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Appendix : Exchange T-Con Board (1)
Solder defect, CNT Broken Solder defect, CNT Broken Solder defect, CNT Broken
Solder defect, CNT Broken T-Con
T-Con Defect,
Defect,
Solder
T-Con CNT
defect,
Defect, CNT
CNT
CNT Broken
Broken
Broken
Broken Abnormal Power Section
Solder defect, Short/Crack Abnormal Power Section Solder defect, Short/Crack
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Appendix : Exchange T-Con Board (2)
Abnormal Power Section Abnormal Power Section Solder defect, Short/Crack
Solder defect, Short/Crack Fuse Open, Abnormal power section Abnormal Display
GRADATION Noise GRADATION
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Appendix : Exchange PSU(LED driver)
No Light Dim Light
Dim Light Dim Light
No picture/Sound Ok
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Appendix : Exchange the Module (1)
Panel Mura, Light leakage Panel Mura, Light leakage Press damage
Crosstalk Press damage Crosstalk
Un-repairable Cases
In this case please exchange the module.
Press damage
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Appendix : Exchange the Module (2)
Vertical Block Vertical Line Vertical Block
Source TAB IC Defect Source TAB IC Defect Source TAB IC Defect
Horizontal Block Horizontal Block Horizontal line
Gate TAB IC Defect Gate TAB IC Defect
Gate TAB IC Defect Gate TAB IC Defect Gate TAB IC Defect
Un-repairable Cases
In this case please exchange the module.
Horizontal Block
Gate TAB IC Defect
Gate TAB IC Defect
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Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _No power date
Revised
Content Check front display LED date A11
ST-BY condition: Red
Front LED control :
Menu Option Standby Light On/Off
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _No power date
Revised
Content Check power input voltage and ST-BY 3.5V A12
date
Check the Main Power Voltage (5,7,8 Pin)
STBY status : 3.5V
28 Pin (Power Board ↔ Main Board)
SMAW200-H28S5K
1 PWR_ON 2 DRV ON
3 P-DIM 4 P-DIM2
5 3.5V 6 GND
7 3.5V 8 3.5V
9 GND 10 GND
11 12V 12 12V
13 12V 14 12V
15 12V 16 GND
17 GND 18 24V
19 24V 20 24V
21 24V 22 GND
23 GND 24 N.C
25 SCLK 26 GND
27 SIN 28 VSYNC
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
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Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _No power date
Revised
Content Checking method when power is ON date A13
Check “power on(Pin 1)” pin is high(about 3.3V)
28 Pin (Power Board ↔ Main Board)
SMAW200-H28S5K
1 PWR_ON 2 DRV ON
3 P-DIM 4 P-DIM2
5 3.5V 6 GND
7 3.5V 8 3.5V
9 GND 10 GND
11 12V 12 12V
13 12V 14 12V
15 12V 16 GND
17 GND 18 24V
19 24V 20 24V
21 24V 22 GND
23 GND 24 N.C
25 SCLK 26 GND
27 SIN 28 VSYNC
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
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Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _Off when on, off whiling viewing date
Revised
Content POWER OFF MODE checking method date A14
Checking order
1. Press the IN-START button of the remote control for adjustment
2. Check the entry into adjustment item 3.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
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Standard Repair Process Detail Technical Manual
Error Established
symptom C. Audio error_No audio/Normal video
date
Revised
Content Checking method in menu when there is no audio date A15
Checking order
1. Press the MENU button on the remote control
2. Select the AUDIO function of the Menu
3. Select TV Speaker Check
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
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Standard Repair Process Detail Technical Manual
Error Established
symptom C. Audio error_No audio/Normal video date
Voltage and speaker checking method Revised
Content date A16
when there is no audio
28 Pin (Power Board ↔ Main Board)
SMAW200-H28S5K
1 PWR_ON 2 DRV ON
3 P-DIM 4 P-DIM2
5 3.5V 6 GND
②
7 3.5V 8 3.5V
9 GND 10 GND
11 12V 12 12V
13 12V 14 12V ①
15 12V 16 GND
17 GND 18 24V
19 24V 20 24V
③
21 24V 22 GND
23 GND 24 N.C
25 SCLK 26 GND
27 SIN 28 VSYNC < Main Ass’y>
Checking order
1. Check the contact condition of or 24V connector of Main Board
2. Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)
3. Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound
when you touch the GND and output terminal, the speaker is normal.
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Standard Repair Process Detail Technical Manual
Error D. Function error_ No response in remote control, Established
symptom key error date
Revised
Content Remote control operation checking method date A17
P4600
1 GND
2 KEY1
3 KEY2
③
4 3.5V_ST
5 GND
6 LED_R/BUZZ
④ 7 IR
① < Sub Ass’y> 8 GND
9 SCL
② 10 SDA
< Main Ass’y>
Checking order
1, 2. Check IR cable condition between IR & Main board.
3. Check the st-by 3.3V on the terminal 4.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the Analog
Tester needle moves slowly, and defective when it does not move at all.
Copyright © 2015 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
