LG 43/49LH5700

Internal Use Only LED TV SERVICE MANUAL CHASSIS : LA66L MODEL : 43LH5700 43LH5700-UD MODEL : 49LH5700 49LH5700-UD CAUTION BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL. P/NO : MFL69442202 (1602-REV00) Printed in Korea

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CONTENTS CONTENTS ............................................................................................... 2 SAFETY PRECAUTIONS ......................................................................... 3 SERVICING PRECAUTIONS .................................................................... 4 SPECIFICATION........................................................................................ 6 ADJUSTMENT INSTRUCTION................................................................. 9 BLOCK DIAGRAM.................................................................................... 17 EXPLODED VIEW ................................................................................... 18 SCHEMATIC CIRCUIT DIAGRAM ............................................ APPENDIX TROUBLESHOOTING............................................................... APPENDIX Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only Only for training and service purposes

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SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. General Guidance Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check. power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.) from electrical shocks. and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity. damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA. replace it with the specified. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer. over 1 W), keep the resistor 10 mm away from PCB. Leakage Current Hot Check circuit Keep wires away from high voltage or high temperature parts. Before returning the receiver to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock. Leakage Current Cold Check(Antenna Cold Check) With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 MΩ and 5.2 MΩ. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer. Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only Only for training and service purposes

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SERVICING PRECAUTIONS CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo- NOTE: If unforeseen circumstances create conflict between the sure of the assembly. following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES on page 3 of this publication, always follow the safety precautions. devices. Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder removal devices not classified as “anti-static” can generate General Servicing Precautions electrical charges sufficient to damage ES devices. 1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate source before; electrical charges sufficient to damage ES devices. a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective ule or any other receiver assembly. package until immediately before you are ready to install it. b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri- other electrical connection. cally shorted together by conductive foam, aluminum foil or c. Connecting a test substitute in parallel with an electrolytic comparable conductive material). capacitor in the receiver. 7. Immediately before removing the protective material from the CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be sion hazard. installed. 2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit, high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions. FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace- Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the 3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your assemblies. foot from a carpeted floor can generate static electricity suf- 4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.) electrical contacts only by applying the following mixture to the contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate (by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the CAUTION: This is a flammable mixture. range or 500 °F to 600 °F. Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed contacts in not required. of 60 parts tin/40 parts lead. 5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned. receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire- 6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle. electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners. correctly installed. 5. Use the following unsoldering technique 7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature. chassis ground before connecting the test receiver positive (500 °F to 600 °F) lead. b. Heat the component lead until the solder melts. Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction- 8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid. service manual. CAUTION: Work quickly to avoid overheating the circuit CAUTION: Do not connect the test fixture ground strap to any board printed foil. heat sink in this receiver. 6. Use the following soldering technique. a. Allow the soldering iron tip to reach a normal temperature Electrostatically Sensitive (ES) Devices (500 °F to 600 °F) Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against ily by static electricity. Such components commonly are called the component lead until the solder melts. Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo- should be used to help reduce the incidence of component dam- nent lead and the foil. age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit 1. Immediately before handling any semiconductor component or board printed foil. semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush. natively, obtain and wear a commercially available discharging wrist strap device, which should be removed to prevent poten- tial shock reasons prior to applying power to the unit under test. Copyright © LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only Only for training and service purposes

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IC Remove/Replacement 3. Solder the connections. Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures. should be used to remove and replace the IC. When working with boards using the familiar round hole, use the standard technique Circuit Board Foil Repair as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit Removal board causing the foil to separate from or "lift-off" the board. The 1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever gently prying up on the lead with the soldering iron tip as the this condition is encountered. solder melts. 2. Draw away the melted solder with an anti-static suction-type At IC Connections solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the the IC. following procedure to install a jumper wire on the copper pattern Replacement side of the circuit board. (Use this technique only on IC connec- 1. Carefully insert the replacement IC in the circuit board. tions). 2. Carefully bend each IC lead against the circuit foil pad and solder it. 1. Carefully remove the damaged copper pattern with a sharp 3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary). (It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if used) from the end of the remaining copper pattern. "Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection. 1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper as possible to the component body. pattern and let it overlap the previously scraped end of the 2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off on the circuit board. any excess jumper wire. 3. Bend into a "U" shape the replacement transistor leads. 4. Connect the replacement transistor leads to the corresponding At Other Connections leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the each connection. installation of a jumper wire on the component side of the circuit board. Power Output, Transistor Device Removal/Replacement 1. Remove the defective copper pattern with a sharp knife. 1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous 2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens. 3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern board. break and locate the nearest component that is directly con- 4. Insert new transistor in the circuit board. nected to the affected copper pattern. 5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the 6. Replace heat sink. nearest component on one side of the pattern break to the lead of the nearest component on the other side. Diode Removal/Replacement Carefully crimp and solder the connections. 1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the sible to diode body. it does not touch components or sharp edges. 2. Bend the two remaining leads perpendicular y to the circuit board. 3. Observing diode polarity, wrap each lead of the new diode around the corresponding lead on the circuit board. 4. Securely crimp each connection and solder it. 5. Inspect (on the circuit board copper side) the solder joints of the two "original" leads. If they are not shiny, reheat them and if necessary, apply additional solder. Fuse and Conventional Resistor Removal/Replacement 1. Clip each fuse or resistor lead at top of the circuit board hollow stake. 2. Securely crimp the leads of replacement component around notch at stake top. Copyright © LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only Only for training and service purposes

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SPECIFICATION NOTE : Specifications and others are subject to change without notice for improvement. 1. Application range 3. Test method This spec sheet is applied to the LED TV used LA66L chassis (1) Performance: LGE TV test method followed (2) Demanded other specification - Safety : UL, CSA, IEC specification - EMC: FCC, ICES, IEC specification 2. Test condition Each part is tested as below without special notice. (1) Temperature : 25 ºC±5 ºC (77 ºC±9ºC), CST : 40 ºC±5 ºC (2) Relative Humidity: 65 % ± 10 % (3) Power Voltage Standard input voltage (100~240V@ 50/60Hz) (4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. (5) The receiver must be operated for about 20 minutes prior to the adjustment. 4. General Specification No Item Specification Result Remark 1 Receiving System ATSC / NTSC-M / 64 & 256 QAM 2 Available Channel 1) VHF : 02~13 2) UHF : 14~69 3) DTV : 02-69 4) CATV : 01~135 5) CADTV : 01~135 3 Input Voltage AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz 4 Market NORTH AMERICA 5 Screen Size 32", 43”, 49", 55” 6 Aspect Ratio 16:9 7 Tuning System FS 8 Module HC320DXN-SLNS5 LGD HC430DUN-SLNX1 LGD NC490DUE-SADP1 LGD LC550DUE-MGA3 9 Operating Environment 1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 % 10 Storage Environment 1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 % Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only Only for training and service purposes

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5. Supported video resolutions 5.1. Component 2D input(Y, CB/PB, CR/PR) No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 1 720*480 15.730 60.000 13.513 SDTV ,DVD 480I 2 720*480 15.730 59.940 13.500 SDTV ,DVD 480I 3 720*480 31.500 60.000 27.027 SDTV 480P 4 720*480 31.470 59.940 27.000 SDTV 480P 5 1280*720 45.000 60.000 74.250 HDTV 720P 6 1280*720 44.960 59.940 74.176 HDTV 720P 7 1920*1080 33.750 60.000 74.250 HDTV 1080I 8 1920*1080 33.720 59.940 74.176 HDTV 1080I 9 1920*1080 67.500 60.000 148.500 HDTV 1080P 10 1920*1080 67.432 59.940 148.352 HDTV 1080P 11 1920*1080 27.000 24.000 74.250 HDTV 1080P 12 1920*1080 26.970 23.976 74.176 HDTV 1080P 13 1920*1080 33.750 30.000 74.250 HDTV 1080P 14 1920*1080 33.710 29.970 74.176 HDTV 1080P Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only Only for training and service purposes

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5.2. HDMI Input (PC/DTV) No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed PC 1 640*350 31.46 70.09 25.17 EGA 2. 720*400 31.46 70.08 28.32 DOS 3. 640*480 31.46 59.94 25.17 VESA(VGA) 4 800*600 37.87 60.31 40.00 VESA(SVGA) 5 1024*768 48.36 60.00 65.00 VESA(XGA) 6 1152*864 54.34 60.05 80.00 VESA 7 1280*1024 63.98 60.02 108.00 VESA (SXGA) FHD only 8 1360*768 47.71 60.01 85.50 VESA (WXGA) 9 1920*1080 67.5 60.00 148.5 WUXGA FHD only (Reduced Blanking) DTV 1 640 * 480 31.46 59.94 25.125 SDTV 480P 2 640 * 480 31.5 60.00 25.125 SDTV 480P 3 720 * 480 15.73 59.94 13.500 SDTV 480I Spec. out but display 4 720 * 480 15.75 60.00 13.514 SDTV 480I Spec. out but display 5 720 * 480 31.47 59.94 27.00 SDTV 480P 6 720 * 480 31.5 60 27.027 SDTV 480P 7 1280*720 44.96 59.94 74.176 HDTV 720P 8 1280*720 45 60.00 74.25 HDTV 720P 9 1920*1080 33.72 59.94 74.176 HDTV 1080I 10 1920*1080 33.75 60.00 74.25 HDTV 1080I 11 1920*1080 26.97 23.97 63.296 HDTV 1080P 12 1920*1080 27.00 24.00 63.36 HDTV 1080P 13 1920*1080 33.71 29.97 79.120 HDTV 1080P 14 1920*1080 33.75 30.00 79.20 HDTV 1080P 15 1920*1080 67.43 59.94 148.350 HDTV 1080P 16 1920*1080 67.5 60.00 148.50 HDTV 1080P Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only Only for training and service purposes

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ADJUSTMENT INSTRUCTION 1. Application 4. MAIN PCBA Adjustments This spec. sheet applies to LA66L Chassis applied LED TV all 4.1. ADC Calibration models manufactured in TV factory - A n ADC calibration is not necessary because MAIN SoC (LGExxxx) is already calibrated from IC Maker - If it needs to adjust manually, refer to appendix. 2. Specification (1) Because this is not a hot chassis, it is not necessary to use 4.2. M AC Address, ESN Key and Widevine an isolation transformer. However, the use of isolation transformer will help protect test instrument. Key download (2) Adjustment must be done in the correct order. 4.2.1. Equipment & Condition (3) The adjustment must be performed in the circumstance of (1) Play file: keydownload.exe 25 ±5 ºC of temperature and 65±10% of relative humidity if there is no specific designation 4.2.2. Communication Port connection (4) The input voltage of the receiver must keep 100~240V, (1) Key Write: Com 1,2,3,4 and 115200 (Baudrate) 50/60Hz (2) Barcode: Com 1,2,3,4 and 9600 (Baudrate) (5) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 4.2.3. Download process 15 ºC (1) Select the download items. In case of keeping module is in the circumstance of 0°C, it (2) Mode check: Online Only should be placed in the circumstance of above 15°C for 2 (3) Check the test process hours - U S, Canada models: DETECT -> MAC_WRITE -> In case of keeping module is in the circumstance of below WIDEVINE_WRITE -20°C, it should be placed in the circumstance of above - K orea, Mexico models: DETECT -> MAC_WRITE -> 15°C for 3 hours. WIDEVINE_WRITE (4) Play : START ※ Caution (5) Check of result: Ready, Test, OK or NG When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. 4.2.4. Communication Port connection Digital pattern 13ch and/or Cross hatch pattern 09ch), there (1) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C can some afterimage in the black level area Port 4.2.5. Download (1) All models (16Y LCD TV + MAC + Widevine + ESN Key 3. Adjustment items and HDCP2.2) 3.1. Main PCBA Adjustments (1) ADC adjustment(OTP) : Component (2) EDID downloads for HDMI 3.2. Final assembly adjustment (1) White Balance adjustment (2) RS-232C functionality check (3) Factory Option setting per destination (4) Shipment mode setting (In-Stop) (5) GND and HI-POT test 3.3. Appendix (1)Tool option menu, USB Download (S/W Update, Option and Service only) (2) Manual adjustment for ADC calibration and White balance. (3) Shipment conditions, Channel pre-set 4.2.6. Inspection - In INSTART menu, check these keys. Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only Only for training and service purposes

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4.3. LAN port Inspection (Ping Test) 4.4.3. EDID DATA 4.3.1. Equipment setting 4.4.3.1. HD PCM (2D 8bit xvYCC : off) : 32LH570B-UC (1) Play the LAN Port Test PROGRAM. (1) HDMI1 (6D , 08) (2) Input IP set up for an inspection to Test Program. * IP Number : 12.12.2.2. 4.3.2. LAN PORT inspection (PING TEST) (1) Play the LAN Port Test Program. (2) connect each other LAN Port Jack. (3) Play Test (F9) button and confirm OK Message. (4) remove LAN CABLE (2) HDMI2 (6D , F8) Step 1) Step 3) Check ‘OK’ Signal 4.4. EDID Download 4.4.1 Overview ▪ I t is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of “Plug and Play”. 4.4.2 Equipment ▪ Since embedded EDID data is used, EDID download JIG, HDMI cable and D-sub cable are not need. ▪ Adjust remocon 4.4.3.2. HD AC3 (2D 8bit xvYCC : off) : 32LH570B-UC (1) HDMI1 (6D , 96) Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only Only for training and service purposes

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(2) HDMI2 (6D , 86) 4.4.3.4. FHD PCM (2D 8bit xvYCC : off) : 43/49/55LH5700-UD (1) HDMI1 (E5 , CC) 4.4.3.3. HD DTS (2D 8bit xvYCC : off) : 32LH570B-UC (1) HDMI1 (6D , 8D) (2) HDMI2 (E5 , BC) (2) HDMI2 (6D , 7D) 4.4.3.5. FHD AC3 (2D 8bit xvYCC : off) : 43/49/55LH5700-UD (1) HDMI1 (E5 , 5A) Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only Only for training and service purposes

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(2) HDMI2 (E5 , 4A) 5. Final Assembly Adjustment 5.1. White Balance Adjustment 5.1.1. Overview 5.1.1.1. W/B adj. Objective & How-it-works (1) Objective: To reduce each Panel’s W/B deviation (2) How-it-works: When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value. (3) Adj. condition: normal temperature - Surrounding Temperature: 25±5 °C - Warm-up time: About 5 Min - Surrounding Humidity: 20% ~ 80% - Before White balance adjustment, Keep power on status, don’t power off  5.1.1.2. Adj. condition and cautionary items (1) Lighting condition in surrounding area surrounding lighting 4.4.3.6. FHD DTS (2D 8bit xvYCC : off) : 43/49/55LH5700-UD should be lower 10 lux. Try to isolate adj. area into dark (1) HDMI1 (E5 , 51) surrounding. (2) Probe location: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface (80°~ 100°) (3) Aging time - After Aging Start, Keep the Power ON status during 5 Minutes. - In case of LCD, Back-light on should be checked using no signal or Full-white pattern. 5.1.2. Equipment (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED: CH14) (2) A dj. Computer (During auto adj., RS-232C protocol is needed) (3) Adjust Remocon (4) V ideo Signal Generator MSPG-925F 720p/204-Gray (Model: 217, Pattern: 49) ※ Color Analyzer Matrix should be calibrated using CS-1000 (2) HDMI2 (E5 , 41) 5.1.3. Equipment connection Co lo r Analyzer Probe RS -232C Co m p ut er RS -232C RS -232C Pat t ern Generat o r Signal Source * If TV internal pattern is used, not needed Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only Only for training and service purposes

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5.1.4. Adjustment Command (Protocol) 5.1.5.2. Manual adjustment (1) RS-232C Command used during auto-adj. (1) Set TV in Adj. mode using POWER ON (2) Zero Calibrate the probe of Color Analyzer, then place it on RS-232C COMMAND Explanation the center of LCD module within 10cm of the surface.. CMD DATA ID (3) Press ADJ key -> EZ adjust using adj. R/C à 9. White- Wb 00 00 Begin White Balance adj. Balance then press the cursor to the right (KEY►). When KEY(►) is pressed 206 Gray internal pattern will be Wb 00 ff End White Balance adj. displayed. (internal pattern disappears ) (4) Adjust Cool modes (i) F ix the one of R/G/B gain to 192 (default data) and (2) Adjustment Map decrease the others. Adj. Command Data Range Default (If G gain is adjusted over 172 and R and B gain less than item (lower caseASCII) (Hex.) (Decimal) 192 , Adjust is O.K.) CMD1 CMD2 MIN MAX (ii) If G gain is less than 172, Increase G gain by up to 172, and then increase R gain and Cool R Gain j g 00 C0 TBD G gain same amount of increasing G gain. (iii) If R gain or B gain is over 255, G Gain j h 00 C0 TBD Readjust G gain less than 172, Conform to R gain is 255 or B Gain j i 00 C0 TBD B gain is 255 R Cut TBD (5) Adjust two modes (Medium / Warm) Fix the one of R/G/B gain to 192 (default data) and decrease the others. G Cut TBD (6) Adj. is completed, Exit adjust mode using “EXIT” key on B Cut TBD Remote controller. Medium R Gain j a 00 C0 TBD G Gain j b 00 C0 TBD 5.1.6. Reference (White Balance Adj. coordinate and color temperature) B Gain j c 00 C0 TBD (1) Luminance: 204 Gray, 80IRE R Cut TBD (2) Standard color coordinate and temperature using CS-1000 G Cut TBD (over 26 inch) B Cut TBD 5.1.7. Reference (White Balance Adj. coordinate and Warm R Gain j d 00 C0 TBD color temperature) G Gain j e 00 C0 TBD ▪ Luminance: 204 Gray ▪ Standard color coordinate and temperature using CS-1000 B Gain j f 00 C0 TBD (over 26 inch) R Cut TBD Coordinate G Cut TBD Mode Temp △uv X Y Cool 0.271 0.270 13,000K 0.0000 5.1.5. Adjustment method 5.1.5.1. Auto WB calibration Medium 0.286 0.289 9,300K 0.0000 (1) Set TV in ADJ mode using P-ONLY key (or POWER ON Warm 0.313 0.329 6,500K 0.0000 key) (2) Place optical probe on the center of the display - It need to check probe condition of zero calibration before adjustment. (3) Connect RS-232C Cable (4) Select mode in ADJ Program and begin a adjustment. (5) When WB adjustment is completed with OK message, check adjustment status of pre-set mode (Cool, Medium, Warm) (6) Remove probe and RS-232C cable. ▪ W/B Adj. must begin as start command “wb 00 00” , and finish as end command “wb 00 ff”, and Adj. offset if need Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only Only for training and service purposes

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▪ S tandard color coordinate and temperature using 5.2. Option selection per country CA-210(CH-14) – by aging time (1) N ormal line in Korea (From January to February) 5.2.1. Overview (1) Tool option selection is only done for models in Non-USA Cool Medium Warm North America due to rating Aging time (2) Applied model: LA42B Chassis applied to CANADA and X Y X Y X Y (Min) MEXICO 271 270 286 289 313 329 1 0-2 286 295 301 314 328 354 5.2.2. Country Group selection 2 3-5 284 290 299 309 326 349 (1) Press ADJ key on the Adj. R/C, and then select Country 3 6-9 282 287 297 306 324 346 Group Menu (2) Depending on destination, select US, then on the lower 4 10-19 279 283 294 302 321 342 Country option, select US, CA, MX. 5 20-35 276 278 291 297 318 337 Selection is done using +, - KEY 6 36-49 274 275 289 294 316 334 7 50-79 273 272 288 291 315 331 5.2.3. Tool Option inspection ▪ Press Adj. key on the Adj. R/C, then select Tool option 8 80-119 272 271 287 290 314 330 * Tool option can be reconstructed by Software 9 Over 120 271 270 286 289 313 329 5.2.3. Country Group Code ▪ S tandard color coordinate and temperature using Country Area Option CA-210(CH-14) – by aging time (2) Normal line in Korea (From March to December) : LGD KR 01 Normal line in Mexico : LGD US 02 Cool Medium Warm Aging time X Y X Y X Y 5.3. Wi-Fi MAC Address Check (Min) 271 270 286 289 313 329 5.3.1. Using RS232 Command Command Set ACK 1 0-2 282 289 297 308 324 348 Transmission [A][l][][Set ID][][20][Cr] [O][K][x] or [N][G] 2 3-5 281 287 296 306 323 346 3 6-9 279 284 294 303 321 343 5.3.2. Check the menu on in-start 4 10-19 277 280 292 299 319 339 5 20-35 275 277 290 296 317 336 6 36-49 274 274 289 293 316 333 7 50-79 273 272 288 291 315 331 8 80-119 272 271 287 290 314 330 9 Over 120 271 270 286 289 313 329 (3) O/S Module(AUO, INX, Sharp, CSOT, BOE) cool med warm x y x y x y spec 271 270 286 289 313 329 target 278 280 293 299 320 339 Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only Only for training and service purposes

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5.6. HDMI ARC Function Inspection 6. AUDIO output check 5.6.1. Test equipment 6.1. Audio input condition - Optic Receiver Speaker (1) RF input: Mono, 1KHz sine wave signal, 100% Modulation - MSHG-600 (SW: 1220 ↑) (2) CVBS, Component: 1KHz sine wave signal (0.4Vrms) - HDMI Cable (for 1.4 version) 5.6.2. Test method 6.2. Specification (1) Insert the HDMI Cable to the HDMI ARC port from the No Item Min Typ Max Unit Remark master equipment (HDMI1) 1 Audio 4.5 5.0 6.0 W (1) Measurement practical max 6.0 6.32 6.93 Vrms condition Output, L/R - EQ/AVL/Clear (Distor- Voice: Off tion=10% (2) Speaker (6Ω max Output) Impedance) (3) 49/43LH57 2 2.7 3.0 3.6 W (1) Measurement 4.03 4.24 4.64 Vrms condition - EQ/AVL/Clear (2) Check the sound from the TV Set Voice: Off (2) Speaker (6Ω Impedance) (3) 32LH57 7. GND and HI-POT Test (3) Check the Sound from the Speaker or using AV & Optic 7.1. GND & HI-POT auto-check preparation (1) Check the POWER CABLE and SIGNAL CABE insertion TEST program (It’s connected to MSHG-600) condition 7.2. GND & HI-POT auto-check (1) Pallet moves in the station. (POWER CORD / AV CORD is tightly inserted) (2) Connect the AV JACK Tester. (3) Controller (GWS103-4) on. (4) GND Test (Auto) - If Test is failed, Buzzer operates. * Remark: Inspect in Power Only Mode and check SW version - If Test is passed, execute next process (Hi-pot test). in a master equipment (Remove A/V CORD from A/V JACK BOX) (5) HI-POT test (Auto) - If Test is failed, Buzzer operates. - If Test is passed, GOOD Lamp on and move to next process automatica 5.7. Ship-out mode check (In-stop) ▪ After final inspection, press In-Stop key of the Adj. R/C and check that the unit goes to Stand-by mode. Copyright © LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only Only for training and service purposes

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7.3. Checkpoint 10. Optional adjustments (1) Test voltage 10.1. Manual White balance Adjustment Products/Model TV 10.1.1. Adj. condition and cautionary items 2Poles Other 3000V(AC)/ (1) Lighting condition in surrounding area surrounding lighting 4242V(DC) should be lower 10 lux. Try to isolate adj. area into dark 3Poles Other 1500V(AC)/ surrounding. 2121V(DC) (2) Probe location: Color Analyzer (CA-210) probe should be within 10cm and perpendicular of the module surface Cut off current 100mA(AC)/100mA(DC) (80°~ 100°) Earth Continutiy test ≤0.1Ὼ at 25A/1 sec (3) Aging time (3Poles only) - A fter Aging Start, Keep the Power ON status during 5 Minutes. (2) TEST time: 1 second - In case of LCD, Back-light on should be checked using no (3) TEST POINT signal or Full-white pattern - GND Test = POWER CORD GND and SIGNAL CABLE GND. - Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL. (4) LEAKAGE CURRENT: At 0.5mArms 10.1.2. Equipment (1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED: CH14) (2) A dj. Computer (During auto adj., RS-232C protocol is 9. USB S/W Download needed) (3) Adjust Remocon (optional, Service only) (4) V ideo Signal Generator MSPG-925F 720p/216-Gray (1) Put the USB Stick to the USB socket (Model: 217, Pattern: 78) (2) Automatically detecting update file in USB Stick - If your downloaded program version in USB Stick is lower than that of TV set, it didn’t work. Otherwise USB data is 10.1.3. Adjustment automatically detected. (1) Set TV in Adj. mode using POWER ON (3) Show the message “Copying files from memory” (2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface. (3) Press ADJ key -> EZ adjust using adj. R/C -> 6. White- Balance then press the cursor to the right (KEY►). W  hen KEY(►) is pressed 216 Gray internal pattern will be displayed. (4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value. (5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of color temperature. (4) Updating is staring. ▪ If internal pattern is not available, use RF input. In EZ Adj. menu 6.White Balance, you can select one of 2 Test-pattern: ON, OFF. Default is inner(ON). By selecting OFF, you can adjust using RF signal in 216 Gray pattern. (5) Updating Completed, The TV will restart automatically (6) If your TV is turned on, check your updated version and Tool option. * If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to channel recover. If all channel data is cleared, you didn’t have a DTV/ ATV test on production line. * After downloading, TOOL OPTION setting is needed again. (1) Push "IN-START" key in service remote controller. (2) Select "Tool Option 1" and Push “OK” button. (3) Punch in the number. (Each model has their number.) Copyright © LG Electronics. Inc. All rights reserved. - 16 - LGE Internal Use Only Only for training and service purposes

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Copyright © X_TAL 24MHz DDR3 1866 2Gb x16 Only for training and service purposes DDR3 1866 2Gb x16 IF (+/-) Digital Demod REAR Tuner Analog Demod I2C EEPROM (256Kb) OCP eMMC 5.0 (4GB) LG Electronics. Inc. All rights reserved. USB1 M2 1.5A USB (NON MCP) * HD Model : 30P SIDE 51P LVDS HDMI1 - 17 - (ARC) HDMI I2S MUX I2C Audio AMP HDMI2 BLOCK DIAGRAM USB_WIFI WIFI REAR AV/COMP CVBS/YPbPr SUB ASSY IR / KEY OPTIC SPDIF OUT IR LAN I2C ETHERNET KEY RS-232 RS-232 Sub Micom I2C (R5F100GEAFB) * RS-232 US Only LGE Internal Use Only

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EXPLODED VIEW IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer. 901 400 902 570 800 571 521 540 530 500 LV1 820 120 700 200 Set + Stand A10 A2 Copyright © LG Electronics. Inc. All rights reserved. - 18 - LGE Internal Use Only Only for training and service purposes

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NVRAM_ROHM NVRAM IC100-*1 BR24G256FJ-3 P/NO A0 VCC 1 8 MCP : EAN64207701 (MSD93F2GW) A1 WP IC100 +3.3V_NORMAL 2 7 NON MCP : EAN64207702 (MSD93F2G) A2 SCL AT24C256C-SSHL-T 3 6 NON-MCP +3.3V_NORMAL GND 4 5 SDA EAN64207702 A0 VCC IC101 NON-MCP 1 8 C112 Write Protection R138 LGE6322(MSD93F2G, w/oT2S2 : M2) IC101 A1 WP 0.1uF - Low : Normal Operation 10K LGE6322(MSD93F2G, w/oT2S2 : M2) 2 7 NON_EU - High : Write Protection TPO_DATA[0-7] A2 SCL 3 6 A25 I2C_SCL1 PCM_5V_CTL PWM0 T25 AA21 TPO_DATA[0] B26 G25 EB_DATA[0] PCM_D[0] TS1_D[0] GND SDA I2C_SDA1 PWM_DIM2 R136 AMP_RESET_N PWM1 R_ODD[7]/LVB0N AB26 W20 TPO_DATA[1] 4 5 B25 G24 EB_DATA[1] PCM_D[1] TS1_D[1] AR101 PWM_DIM2 PWM2 R_ODD[6]/LVB0P Y24 AB20 TPO_DATA[2] 33 100 C24 H25 EB_DATA[2] PCM_D[2] TS1_D[2] PWM3 R_ODD[5]/LVB1N TXB3P P21 AB19 TPO_DATA[3] H24 EB_DATA[3] PCM_D[3] TS1_D[3] R_ODD[4]/LVB1P TXB3N R22 W19 TPO_DATA[4] NVRAM_ATMEL PWM_DIM D7 J25 EB_DATA[4] PCM_D[4] TS1_D[4] 100 R135 PWM_PM R_ODD[3]/LVB2N TXBCLKP AA24 AB21 TPO_DATA[5] J26 EB_DATA[5] PCM_D[5] TS1_D[5] R_ODD[2]/LVB2P TXBCLKN T21 AA19 TPO_DATA[6] J24 EB_DATA[6] PCM_D[6] TS1_D[6] R_ODD[1]/LVBCLKN TXB2P V21 AA20 TPO_DATA[7] E6 K26 EB_DATA[7] PCM_D[7] TS1_D[7] SAR0 R_ODD[0]/LVBCLKP TXB2N Y20 E5 K25 TS1_CLK TPO_CLK SAR1 G_ODD[7]/LVB3N TXB1P Y21 F5 K24 TS1_VLD TPO_VAL SAR2 G_ODD[6]/LVB3P TXB1N V26 Y19 X-TAL MIU1_STR_PD TP1030 F6 G5 SAR3 SAR4 G_ODD[5]/LVB4N G_ODD[4]/LVB4P L25 L24 TXB0P TXB0N EB_ADDR[0] EB_ADDR[1] V23 N21 PCM_A[0] PCM_A[1] TS1_SYNC TPO_SYNC TPI_DATA[0-7] MIU0_STR_PD TP1031 M25 EB_ADDR[2] PCM_A[2] G_ODD[3]/LVA0N U23 AF20 TPI_DATA[0] 3225 M26 EB_ADDR[3] PCM_A[3] TS0_D[0] G_ODD[2]/LVA0P W26 AC21 TPI_DATA[1] SUNNY ELECTRONICS CORPORATION B2 M24 EB_ADDR[4] PCM_A[4] TS0_D[1] XTAL_IN MIU1_STR_PD PM_SPI_CK G_ODD[1]/LVA1N TXA3P AA25 AE21 TPI_DATA[2] +3.3V_SB R152 33 A2 N26 EB_ADDR[5] RETENTION_DISABLE TXA3N PCM_A[5] TS0_D[2] X100 PM_SPI_DI G_ODD[0]/LVA1P U22 AF21 TPI_DATA[3] B1 N25 EB_ADDR[6] PCM_A[6] TS0_D[3] 8pF 8pF 24MHz R137 MIU0_STR_PD PM_SPI_DO B_ODD[7]/LVA2N TXACLKP V25 AC19 TPI_DATA[4] X-TAL_1 GND_2 H8 N24 EB_ADDR[7] C100-*1 C101-*1 1 4 1M TXACLKN PCM_A[7] TS0_D[4] R105 NC_13 B_ODD[6]/LVA2P V22 AD20 TPI_DATA[5] C100 C1 P25 EB_ADDR[8] PCM_A[8] TS0_D[5] GND_1 X-TAL_2 10K AGP GPIO_PM[6]/(SPI-CZ1N) B_ODD[5]/LVACLKN TXA2P V24 AE20 TPI_DATA[6] 10pF 2 3 XTAL_OUT C2 P24 8pF 8pF OPT EB_ADDR[9] PCM_A[9] TS0_D[6] 50V GPIO_PM[10]/(SPI-CZ2N) B_ODD[4]/LVACLKP TXA2N P22 AE19 TPI_DATA[7] 50V 50V A3 R25 EB_ADDR[10] 10pF C101 INSTANT_BOOT TXA1P PCM_A[10] TS0_D[7] TUNER_IF_100ohm PM_SPI_HOLDN(GPIO) B_ODD[3]/LVA3N U21 AD19 0CZZB00024A 10pF C3 R26 EB_ADDR[11] PCM_A[11] TS0_CLK TPI_CLK WOL_WAKE_UP_SOC PM_SPI_WPN/(GPIO) B_ODD[2]/LVA3P TXA1N W25 AE22 R145-*1 50V R24 EB_ADDR[12] TPI_VAL 100 10pF Option R106 TXA0P PCM_A[12] TS0_VLD 10K B_ODD[1]/LVA4N Y25 AD21 10pF D5 T26 EB_ADDR[13] PCM_A[13] TS0_SYNC TPI_SYNC OPT DDCA_CK DDCA_CK B_ODD[0]/LVA4P TXA0N AB24 D6 EB_ADDR[14] PCM_A[14] DDCA_DA DDCA_DA AB22 FE_DEMOD1_TS_SYNC TUNER_IF_100ohm TS2_SYNC AC22 J21 F25 TS2_CLK FE_DEMOD1_TS_CLK R146-*1 DDCR_CK SPI1_DI T23 AC23 100 H21 F26 CI_IREQ# PCM_IRQA_N TS2_VLD FE_DEMOD1_TS_VAL DDCR_DA SPI1_CK R21 AB23 L23 BIT4 CI_OE# PCM_OE_N TS2_D[0] FE_DEMOD1_TS_DATA[0] GPIO6 T22 N23 BIT5 CI_IORD# PCM_IORD_N H22 GPIO9 N22 AB25 Close to MSTAR BIT6 CI_CE1# PCM_CE_N UART_TX2 GPIO10 AA26 AC3 R145 0 H23 F24 CI_WE# PCM_WE_N NC_1 I_P_SoC IF_P UART_RX2 VSYNC_LIKE U25 AB2 TUNER_IF_0ohm C119 AA23 CI_CD# PCM_CD_N NC_2 I_N_SoC OPT TS2_D[1] FE_DEMOD1_TS_DATA[1] T24 AB3 0.1uF C121 E22 Y23 CI_RESET PCM_RESET NC_3 Q_P_SoC IF_FILTER 100pF DDTS_TX GPIO7/TX1 TS2_D[3] FE_DEMOD1_TS_DATA[3] P23 AA1 SATELLITE R146 0 F21 AA22 CI_REG# Q_N_SoC IF_N DDTS_RX FE_DEMOD1_TS_DATA[2] PCM_REG_N NC_4 TUNER_IF_0ohm GPIO8/RX1 TS2_D[2] U24 AC2 C120 C122 C123 BIT7 E20 Y2 CI_IOWR# PCM_IOWR_N NC_5 IF_AGC_S_SOC 0.1uF GPIO11/TX3 LINEIN_L3 W24 33pF 33pF F20 Y4 CI_WAIT# IF_FILTER 5V_DET_HDMI_2 PCM_WAIT_N IF_FILTER_CAP IF_FILTER_CAP GPIO12/RX3 LINEIN_R3 AC4 AB6 NC_6 LNB_TX PCM2_WAIT_N/TX4 M23 PCM2_IRQA_N AD26 AF4 M22 EMMC_STRB EMMC_IO[8](EMMC_DS)(NAND_ALE) VIFP PCM2_CE_N AC25 AE4 AC6 Y22 EMMC_CLK EMMC_IO[10](EMMC_CLK)(NAND_RBZ) VIFM TU_SIF TU_SIF NC_14 TS2_D[4] FE_DEMOD1_TS_DATA[4] AC24 AF5 C102 0.1uF R102 47 W23 EMMC_CMD EMMC_IO[9](EMMC_CMD) SIFP TU_SIF TS2_D[5] FE_DEMOD1_TS_DATA[5] AD25 AE5 C103 0.1uF R103 47 W22 EMMC_RST EMMC_IO[11](EMMC_RSTN) SIFM OPT TS2_D[6] FE_DEMOD1_TS_DATA[6] AF24 TU_SIF C110 R117 W21 EMMC_DATA[0] EMMC_IO[0](EMMC_D0)(NAND_CEZ) TU_SIF 1000pF TS2_D[7] FE_DEMOD1_TS_DATA[7] AE24 OPT 300 J5 EMMC_DATA[1] EMMC_IO[1](EMMC_D1)(NAND_WPZ) 1% AV_CVBS_DET GPIO_PM[0] AF25 AD4 +3.3V_NORMAL E8 EMMC_DATA[2] EMMC_IO[2](EMMC_D2)(NAND_CLE) IFAGC I2C_1 : AMP, L/D, NVM, TCON SOC_TX GPIO_PM[1](PM_UART) AD23 M4 EMMC_DATA[3] I2C I2C_2 I2C_3 : : TUNER MICOM COMP2_DET /USB_OCD1 J6 GPIO_PM[2] GPIO_PM[3] NC_15 AD2 MCP_SCL EMMC_DATA[4] AF23 AE23 EMMC_IO[3]/(EMMC_D3)(NAND_DQS) EMMC_IO[4](EMMC_D4)(NAND_REZ) AB4 R101 10K +3.3V_NORMAL N4 AD1 EMMC_DATA[5] EMMC_IO[5](EMMC_D5)(NAND_CE1Z) TGPIO0 /USB_OCD2 MCP_SDA I2C_4 : S/Demod,T2/Demod, LNB ==> only for LNB - Satellite Model F8 GPIO_PM[4] NC_16 EMMC_DATA[6] AE26 AD5 T2/S2 IF_FILTER SOC_RX EMMC_IO[6](EMMC_D6)(NAND_WEZ) TGPIO1 L102 GPIO_PM[5](PM_UART) AE25 AE3 I2C_SCL4 K5 EMMC_DATA[7] EMMC_IO[7](EMMC_D7) TGPIO2/SCKM1 R104 BLM15PX121SN1 USB_CTL1 GPIO_PM[7] AD3 +3.3V_SB +3.3V_NORMAL +3.3V_TUNER +3.3V_NORMAL K6 C5 10K TGPIO3/SDAM1 I2C_SDA4 /TU_RESET1 GPIO_PM[8] IRIN OPT IF_FILTER IF_FILTER L6 C118 M_RFModule_RESET GPIO_PM[9] P10 R144 0.1uF C4 10K R141 NC_7 R140 5V_DET_HDMI_1 OPT GPIO_PM[11]/(PM_UART) N10 B4 F7 R153 33 NC_8 TP343 IF_FILTER 0 5V_DET_HDMI_3 GPIO_PM[12](PM_UART) VID0 VID_CTRL R147 0 N11 B3 E7 NC_9 TP344 0 USB_CTL2 GPIO_PM[15] VID1 P11 IF_AGC NC_10 TP345 IF_FILTER R10 AR102 R115 R116 AR103 I2C_SCL1 K21 NC_11 TP346 C124 3.3K GPIO17/SCKM0 R11 0.022uF 1.8K 1.8K 3.3K L22 AE1 XTAL_IN NC_12 TP347 I2C_SDA1 GPIO18/SDAM0 XTAL_IN 16V I2C_SCL2 K22 AF2 XTAL_OUT I2C_SCL1 GPIO15/SCKM2 XTAL_OUT L21 I2C_SDA1 I2C_SDA2 GPIO14/SDAM2 I2C_SCL2 M11 GND_1 VDD33 I2C_SDA2 I2C_SCL3 J22 M7 R150 TCON5/SCKM4 GND_2 0 I2C_SCL3 K23 J7 OPT I2C_SDA3 TCON4/SDAM4 NC_17 I2C_SDA3 RESET D8 SOC_RESET MCP for T2/S2 MCP EAN64207701 IC101-*1 LGE6321(MSD93F2GW, w/ T2S2 : M2) MCP IC101-*1 LGE6321(MSD93F2GW, w/ T2S2 : M2) A25 PWM0 B26 G25 PWM1 R_ODD[7]/LVB0N B25 G24 PWM2 R_ODD[6]/LVB0P T25 AA21 C24 H25 PCM_D[0] TS1_D[0] PWM3 R_ODD[5]/LVB1N AB26 W20 H24 R_ODD[4]/LVB1P PCM_D[1] TS1_D[1] D7 J25 Y24 AB20 PWM_PM R_ODD[3]/LVB2N PCM_D[2] TS1_D[2] J26 P21 AB19 R_ODD[2]/LVB2P PCM_D[3] TS1_D[3] J24 R22 W19 R_ODD[1]/LVBCLKN PCM_D[4] TS1_D[4] E6 K26 AA24 AB21 SAR0 R_ODD[0]/LVBCLKP PCM_D[5] TS1_D[5] E5 K25 T21 AA19 SAR1 G_ODD[7]/LVB3N PCM_D[6] TS1_D[6] F5 K24 V21 AA20 SAR2 G_ODD[6]/LVB3P PCM_D[7] TS1_D[7] F6 L25 Y20 SAR3 G_ODD[5]/LVB4N TS1_CLK G5 L24 Y21 SAR4 G_ODD[4]/LVB4P TS1_VLD M25 V26 Y19 G_ODD[3]/LVA0N PCM_A[0] TS1_SYNC M26 V23 G_ODD[2]/LVA0P PCM_A[1] B2 M24 N21 PCM_A[2] SATELLITE A2 PM_SPI_CK G_ODD[1]/LVA1N N26 U23 PCM_A[3] TS0_D[0] AF20 PM_SPI_DI G_ODD[0]/LVA1P W26 AC21 B1 N25 PCM_A[4] TS0_D[1] PM_SPI_DO B_ODD[7]/LVA2N AA25 AE21 H8 N24 PCM_A[5] TS0_D[2] NC_13 B_ODD[6]/LVA2P U22 AF21 C1 P25 PCM_A[6] TS0_D[3] GPIO_PM[6]/(SPI-CZ1N) B_ODD[5]/LVACLKN V25 AC19 TP139 EB_DATA[0] TP149 I_P_SoC C2 GPIO_PM[10]/(SPI-CZ2N) B_ODD[4]/LVACLKP P24 V22 PCM_A[7] TS0_D[4] AD20 A3 R25 PCM_A[8] TS0_D[5] PM_SPI_HOLDN(GPIO) B_ODD[3]/LVA3N V24 AE20 TP140 EB_DATA[1] TP150 I_N_SoC C3 PM_SPI_WPN/(GPIO) B_ODD[2]/LVA3P R26 P22 PCM_A[9] TS0_D[6] AE19 R24 B_ODD[1]/LVA4N PCM_A[10] TS0_D[7] U21 AD19 PCM_5V_CTL TP141 EB_DATA[2] TP160 Q_P_SoC D5 T26 PCM_A[11] TS0_CLK TP148 D6 DDCA_CK B_ODD[0]/LVA4P W25 PCM_A[12] TS0_VLD AE22 DDCA_DA Y25 AD21 TP142 EB_DATA[3] TP161 Q_N_SoC AB24 PCM_A[13] TS0_SYNC J21 F25 TPO_DATA[0-7] TP199 DDCR_CK SPI1_DI PCM_A[14] AB22 TP143 EB_DATA[4] TP162 IF_AGC_S_SOC H21 DDCR_DA SPI1_CK F26 TS2_SYNC AC22 L23 TS2_CLK MCP Debug Mstart Debug DDTS_Debug TPI_DATA[0-7] EB_ADDR[0] TP198 TP115 TP144 TP137 EB_DATA[5] EB_DATA[6] TP163 LNB_TX H22 H23 UART_TX2 UART_RX2 GPIO6 GPIO9 GPIO10 VSYNC_LIKE N23 N22 F24 AA23 T23 R21 T22 AB25 PCM_IRQA_N PCM_OE_N PCM_IORD_N PCM_CE_N TS2_VLD TS2_D[0] AC23 AB23 TS2_D[1] AA26 AC3 EB_ADDR[1] TP116 TP138 EB_DATA[7] TP164 I2C_SCL4 E22 GPIO7/TX1 TS2_D[3] Y23 U25 PCM_WE_N NC_1 AB2 F21 AA22 PCM_CD_N NC_2 GPIO8/RX1 TS2_D[2] T24 AB3 EB_ADDR[2] TP117 TP126 CI_REG# TP165 I2C_SDA4 E20 GPIO11/TX3 LINEIN_L3 Y2 P23 PCM_RESET NC_3 AA1 F20 Y4 PCM_REG_N NC_4 GPIO12/RX3 LINEIN_R3 EB_ADDR[3] TP118 CI_CE1# SATELLITE - LNB only AB6 U24 PCM_IOWR_N NC_5 AC2 DEBUG +3.3V_SB TP127 M23 PCM2_WAIT_N/TX4 W24 PCM_WAIT_N PCM2_IRQA_N AC4 T2/S2 DEBUG EB_ADDR[4] TP119 TP128 TPI_SYNC M22 PCM2_CE_N NC_6 AC6 Y22 JK101 NC_14 TS2_D[4] AD26 AF4 JK102 +3.3V_NORMAL JK100 EB_ADDR[5] TP120 CI_WE# W23 EMMC_IO[8](EMMC_DS)(NAND_ALE) VIFP 12507WS-04L TP129 TS2_D[5] W22 AC25 EMMC_IO[10](EMMC_CLK)(NAND_RBZ) VIFM AE4 TS2_D[6] AC24 AF5 12507WS-04L 12507WS-04L EB_ADDR[6] TP121 CI_OE# W21 EMMC_IO[9](EMMC_CMD) SIFP TP130 TP166 5V_DET_HDMI_2 J5 TS2_D[7] AD25 EMMC_IO[11](EMMC_RSTN) SIFM AE5 GPIO_PM[0] AF24 EB_ADDR[7] TP109 E8 10K EMMC_IO[0](EMMC_D0)(NAND_CEZ) TP131 CI_RESET /USB_OCD2 GPIO_PM[1](PM_UART) AE24 TP167 M4 GPIO_PM[2] AF25 EMMC_IO[1](EMMC_D1)(NAND_WPZ) AD4 EB_ADDR[8] TP110 TPI_VAL J6 AD2 EMMC_IO[2](EMMC_D2)(NAND_CLE) IFAGC TP132 GPIO_PM[3] NC_15 OPT AD23 1 TP168 USB_CTL2 N4 GPIO_PM[4] NC_16 AD1 AF23 EMMC_IO[3]/(EMMC_D3)(NAND_DQS) 1 EB_ADDR[9] TP111 F8 GPIO_PM[5](PM_UART) EMMC_IO[4](EMMC_D4)(NAND_REZ) 1 K5 GPIO_PM[7] AE23 EMMC_IO[5](EMMC_D5)(NAND_CE1Z) TGPIO0 AB4 R148 AE26 AD5 EB_ADDR[10] TP112 TP133 TPI_CLK K6 GPIO_PM[8] IRIN C5 EMMC_IO[6](EMMC_D6)(NAND_WEZ) TGPIO1 AR104 L6 AE25 AE3 T2/S2 EB_ADDR[11] GPIO_PM[9] EMMC_IO[7](EMMC_D7) TGPIO2/SCKM1 AD3 3.3K 2 DDTS_RX TP113 TP134 CI_IREQ# C4 B4 GPIO_PM[11]/(PM_UART) F7 TGPIO3/SDAM1 2 2 EB_ADDR[12] TP114 B3 GPIO_PM[12](PM_UART) VID0 E7 P10 10K NC_7 TP135 CI_WAIT# GPIO_PM[15] VID1 NC_8 N10 N11 EB_ADDR[13] TP106 K21 GPIO17/SCKM0 NC_9 OPT L22 AE1 P11 NC_10 3 EB_ADDR[14] TP108 K22 GPIO18/SDAM0 XTAL_IN AF2 NC_11 R10 3 MCP_SCL 3 DDCA_CK TP123 CI_CD# L21 GPIO15/SCKM2 XTAL_OUT NC_12 R11 GPIO14/SDAM2 R149 TPO_CLK TP147 M11 GND_1 J22 M7 4 TPO_VAL TP145 TP125 CI_IORD# TCON5/SCKM4 GND_2 4 DDTS_TX K23 TCON4/SDAM4 NC_17 J7 MCP_SDA 4 DDCA_DA TPO_SYNC D8 TP146 TP136 CI_IOWR# RESET 5 5 5 TP1011 PWM_DIM2 HP_LOUT_SOC TP1012 TP1001 TXB3P HP_ROUT_SOC TP1013 TP1002 TXB3N HP_DET M_RFModule_RESET TP1014 TP1015 TP1003 TP1004 TP1005 TXBCLKP TXBCLKN TXB2P FOR BRAZIL Energy Regulation EYE_SDA EYE_SCL TP1016 TP1017 TP1006 TP1007 TXB2N TXB1P need to ADD SILK FOR LH57 EU MODEL TP1008 TP1009 TP1010 TXB1N TXB0P TXB0N "LJ6 CHASSIS" THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES FOR LH57 HD MODEL SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 16Y_M2 2015.10.02 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1 1 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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NON-MCP EAN64207702 IC101 LGE6322(MSD93F2G, w/oT2S2 : M2) K2 V1 NON-MCP D0-_HDMI3 A_RX0N LINEIN_L1 D0+_HDMI3 L3 A_RX0P LINEIN_R1 V3 IC101 D1-_HDMI3 L2 A_RX1N LINEIN_L2 W1 2.2uF C302 COMP2_L_IN +1.10V_VDDC LGE6322(MSD93F2G, w/oT2S2 : M2) M3 W2 2.2uF C303 COMP2_R_IN D1+_HDMI3 A_RX1P LINEIN_R2 M2 32inch_NON_EU 32inch_NON_EU D2-_HDMI3 A_RX2N C307 C308 M1 NON-MCP D2+_HDMI3 A_RX2P 1000pF 1000pF VDDC 1.05V G26 L8 CK-_HDMI3 K3 A_RXCN LINEOUT_L0 T1 50V 50V IC101 H19 VDDC_1 GND_57 L9 +1.10V_VDDC CK+_HDMI3 K1 A_RXCP LINEOUT_R0 U3 LGE6322(MSD93F2G, w/oT2S2 : M2) J20 VDDC_2 GND_58 L10 M5 W3 VDDC_3 GND_59 DDC_SCL_3 DDCDA_CK LINEOUT_L2 HP_LOUT_SOC J17 L11 M6 Y3 VDDC_4 GND_60 DDC_SDA_3 DDCDA_DA LINEOUT_R2 HP_ROUT_SOC J18 L12 T4 VDDC_5 GND_61 HDMI_HPD_5V_3 HOTPLUGA P3 A5 C323 C325 C328 C338 C347 C350 C353 C355 C359 C363 C344 J19 L13 RIN0P TN EPHY_TDN 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF VDDC_6 GND_62 N2 B5 10uF 10uF 1uF 1uF 0.1uF K20 L14 V2 GIN0M TP EPHY_TDP 10V 10V 10V 10V 10V 16V 16V 16V 16V 16V 16V VDDC_7 GND_63 VAG N1 B6 K17 L15 G2 U2 GIN0P RN EPHY_RDN VDDC_8 GND_64 D0-_HDMI2 TP320 D0-_HDMI2 B_RX0N AVSS_VRM_ADC N3 A6 K18 L16 H3 C304 C305 BIN0P RP EPHY_RDP VDDC_9 GND_65 D0+_HDMI2 TP321 D0+_HDMI2 B_RX0P 10uF C22 K19 M8 H2 0.1uF GPIO19(LAN_LED[0])/ET_COL VDDC_10 GND_66 10V L300 P5 B21 L20 M9 D1-_HDMI2 TP322 D1-_HDMI2 B_RX1N J3 HSYNC0 GPIO20(LAN_LED[1])/ET_TX_TXD1 VDDC_11 GND_67 D1+_HDMI2 TP323 D1+_HDMI2 B_RX1P N6 L17 M10 J2 VSYNC0 VDDC_12 GND_68 D2-_HDMI2 TP324 D2-_HDMI2 B_RX2N Closed to SoC Side BLM15PX121SN1 AVDDL_MOD L18 M12 J1 +1.10V_VDDC AVDDL_MOD VDDC_13 GND_69 D2+_HDMI2 TP325 D2+_HDMI2 B_RX2P R355100 A21 HP_DET L19 M13 G3 E21 SPDIF_OUT GPIO21/ET_TXD0 AVDDL_DVI VDDC_14 GND_70 CK-_HDMI2 TP326 CK-_HDMI2 B_RXCN SPDIF_IN +3.3V_SB SPDIF_OPTIC 33 R333 0.047uF C314 R1 C20 MODEL_OPT_8 L311 N18 M14 G1 D21 COMP2_Pr+ RIN1P GPIO22/ET_TX_EN BLM15PX121SN1 AVDDL_MOD GND_71 CK+_HDMI2 TP327 CK+_HDMI2 B_RXCP SPDIF_OUT COMP2_Pr+ TP310 68 R334 0.047uF C315 R2 C21 MODEL_OPT_9 T18 M15 J4 GIN1M GPIO23/ET_TX_CLK AVDDL_DVI GND_72 33 R335 0.047uF C316 R3 B22 M16 R360 4.7K R361 4.7K R362 4.7K R367 4.7K DDC_SCL_2 DDCDB_CK OPT OPT DDC_SCL_2 TP312 MODEL_OPT_10 OPT TP328 K4 COMP2_Y+/AV_CVBS_IN COMP2_Y+/AV_CVBS_IN GIN1P GPIO24/ET_RXD0 DVDD_DDR GND_73 DDC_SDA_2 DDC_SDA_2 DDCDB_DA I2S_I/F 33 R336 0.047uF C317 P2 B23 MODEL_OPT_11 C358 C362 M17 TP329 V4 C26 R356 100 TP314 BIN1P GPIO25/ET_MDC 0.1uF 0.1uF GND_74 COMP2_Pb+ COMP2_Pb+ HDMI_HPD_5V_2 TP330 HDMI_HPD_5V_2 HOTPLUGB I2S_OUT_BCK AUD_SCK U5 C23 MODEL_OPT_12 16V 16V R14 M18 D25 R357 100 HSYNC1 GPIO26/ET_MDIO DVDD_DDR_A_1 GND_75 I2S_OUT_MCK AUD_MASTER_CLK U6 A22 MODEL_OPT_13 R15 M19 C25 R358 100 VSYNC1 GPIO27/ET_RXD1 DVDD_DDR_A_2 GND_76 I2S_OUT_WS AUD_LRCK H12 M20 D2 D26 R359 100 DVDD_DDR_B_1 GND_77 D0-_HDMI1 D_RX0N I2S_OUT_SD AUD_LRCH W4 AVDDL_DVI J12 M21 E3 D24 NC_18 DVDD_DDR_B_2 GND_78 T2 P6 +1.10V_VDDC N9 R363 4.7K R364 4.7K R365 4.7K R366 4.7K C372 C374 C375 OPT D0+_HDMI1 D_RX0P I2S_OUT_SD1/SDAM5 C373 OPT E2 E25 NC_19 DM_P0 WIFI_DM L309 GND_79 D1-_HDMI1 22pF 22pF 33pF 22pF TP380 AUD_MASTER_CLK N5 BLM15PX121SN1 N12 D_RX1N I2S_OUT_SD2/SCKM5 WIFI_DP F3 E24 OPT OPT OPT OPT DP_P0 GND_80 D1+_HDMI1 D_RX1P I2S_OUT_SD3(GPIO) R337 68 C318 0.047uF W6 R5 H17 N13 F2 VCOM DM_P1 USB_DM2 TP331 USB_DM2 VDDC_SRAM_1 GND_81 D2-_HDMI1 D_RX2N Chip config. R6 C360 H18 N14 F1 DP_P1 USB_DP2 TP332 USB_DP2 C356 VDDC_SRAM_2 GND_82 D2+_HDMI1 W5 A24 0.1uF 0.1uF N15 D_RX2P 0 D3 F22 OPT R352 CVBS0 DM_P2 16V 16V GND_83 CK-_HDMI1 D_RXCN I2S_IN_BCK R308 33 C336 0.047uF Y6 B24 H20 N16 D1 E23 OPT 0 R353 TU_CVBS CVBS1 DP_P2 CTRL_SRAMLDO GND_84 CK+_HDMI1 D_RXCP I2S_IN_SD OPT C321 0.047uF V5 T6 N17 F4 F23 OPT 1K R354 C345 CVBS2 DM_P3 USB_DM1 GND_85 DDC_SCL_1 DDCDD_CK I2S_IN_WS T5 N19 E4 1000pF DP_P3 USB_DP1 GND_86 DDC_SDA_1 DDCDD_DA R340 33 N20 R4 DVDD_DDR +1.5V_DDR_0 GND_87 HDMI_HPD_5V_1 HOTPLUGD DTV/MNT_VOUT TP313 COMP2_Y+/AV_CVBS_IN V6 P8 DTV/MNT_VOUT Y5 CVBS_OUT1 DDR3 1.5V L310 T14 GND_88 P9 AA2 BIT2 NC_20 +1.5V_DDR_0 BLM15PX121SN1 AVDD_DDR0_C GND_89 C370 DDCDC_CK(GPIO_PM) +1.5V_DDR_1 T15 P12 1uF R345 AA3 BIT3 AVDD_DDR0_D_1 GND_90 DDCDC_DA(GPIO_PM) T16 P13 0 L5 C361 AVDD_DDR0_D_2 GND_91 HDMI_ARC C357 J13 P14 ARC0 0.1uF 0.1uF 25V CEC G4 JTAG 16V 16V J14 AVDD_DDR1_C GND_92 P15 CEC TP300 CEC C309 C311 C313 C320 B20 TCK0 AVDD_DDR1_D_1 GND_93 GPIO2/EJ_TCK 0.1uF 10uF 0.1uF 0.1uF J15 P16 D22 TMS0 16V 10V 16V 16V AVDD_DDR1_D_2 GND_94 GPIO3/EJ_TMS P17 BIT0 H5 D20 TDI0 GND_95 GPIO_PM[13]/MHL_CBUS GPIO4/EJ_TDI P18 BIT1 H6 D23 TDO0 +1.5V_DDR_1 GND_96 GPIO_PM[14]/MHL_VBUS_EN GPIO5/EJ_TDO P19 GND_97 P20 +1.5V_DDR_0 GND_98 C366 0.22uF A8 R7 AVDD04_DDR_B GND_99 C367 0.22uF AF7 R8 DDR3 1.5V C368 0.22uF B8 AVDD04_DDR_A GND_100 R9 +1.5V_DDR_1 AVDD11_DDR_B GND_101 C369 0.22uF AE7 R12 VDD33 AVDD11_DDR_A GND_102 R13 GND_103 R16 GND_104 G7 R17 C310 C312 C319 C334 AVDD_PLL GND_105 0.1uF 10uF 0.1uF 0.1uF L7 R18 16V 10V 16V 16V AVDD_MOD GND_106 H7 R19 VDDP GND_107 +3.3V_SB Jtag I/F AVDD_3P3 GND_108 T3 T8 For Main GND_109 GND_110 T9 U7 T10 AVDD3P3_ETH GND_111 C371 P7 T11 AVDD3P3_ADC GND_112 R346 JTAG R348 JTAG R349 JTAG R350 JTAG 0.1uF AVDD_AU33 AB7 T12 JTAG Normal Power 3.3V AVDD_DMPLL AVDD3P3_DADC GND_113 T7 T13 VDD33 1K 1K 1K 1K +3.3V_SB AVDD_AU33 GND_114 AA7 T17 P300 L301 AVDD_3P3_USB AVDD3P3_DMPLL GND_115 12505WS-10A00 N7 T19 BLM15PX121SN1 W_VD33 AVDD3P3_USB_1 GND_116 JTAG N8 T20 1 AVDD3P3_USB_2 GND_117 C322 C324 C327 C337 C348 C351 C354 Y7 U8 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF AVDD_NODIE GND_118 2 TDI0 U9 10V 16V 16V 16V 16V 16V 16V GND_119 3 D4 U10 TDO0 AVDD_5V_HDMI_D GND_120 U11 4 TMS0 GND_121 U12 5 TCK0 GND_122 U13 GND_123 6 SOC_RESET R20 U14 AVDD_PLL AVDD_MOD VDDP TP342 VSENSE_VDD GND_124 7 U15 W_VDD GND_125 OPT 1K 47K U16 R347 R351 OPT 8 GND_126 AB5 U17 9 NC_21 GND_127 AC5 U18 NC_22 GND_128 10 U19 VDDP_NAND GND_129 11 U20 GND_130 Y18 V7 VDDP_3318 GND_131 STby 3.4V 3.3V_EMMC V8 VDDP_NAND GND_132 +3.3V_SB OPT V9 AVDD_3P3 L313 GND_133 L303 V10 BLM15PX121SN1 GND_134 BLM15PX121SN1 A11 V11 GND_3 GND_135 A14 V12 GND_4 GND_136 C331 C341 C339 C364 C365 A17 V13 0.1uF C329 GND_5 GND_137 0.1uF 0.1uF 0.1uF DVDD18_EMMC 10uF 0.1uF B7 V14 16V 16V 16V 16V 10V 16V GND_6 GND_138 L312 C6 V15 BLM15PX121SN1 GND_7 GND_139 C7 V16 GND_8 GND_140 C8 V17 GND_9 GND_141 C9 V18 AVDD_AU33 GND_10 GND_142 C19 V19 L306 GND_11 GND_143 BLM15PX121SN1 D14 V20 GND_12 GND_144 D17 W7 GND_13 GND_145 C342 OPT 0 E9 W8 C332 R303 GND_14 GND_146 0.1uF 0.1uF F9 W9 16V 16V GND_15 GND_147 MCP F10 W10 IC101-*1 GND_16 GND_148 LGE6321(MSD93F2GW, w/ T2S2 : M2) MCP F11 W11 IC101-*1 GND_17 GND_149 LGE6321(MSD93F2GW, w/ T2S2 : M2) AVDD_DMPLL G6 W12 G26 L8 L307 OPT 0 R307 G8 GND_18 GND_150 W13 VDDC_1 GND_57 H19 J20 VDDC_2 GND_58 L9 L10 K2 V1 BLM15PX121SN1 GND_19 GND_151 A_RX0N LINEIN_L1 J17 VDDC_3 GND_59 L11 L3 A_RX0P LINEIN_R1 V3 G9 W14 J18 VDDC_4 GND_60 L12 L2 A_RX1N LINEIN_L2 W1 GND_20 GND_152 J19 VDDC_5 GND_61 L13 M3 A_RX1P LINEIN_R2 W2 G10 W15 K20 VDDC_6 GND_62 L14 M2 A_RX2N C330 C340 GND_21 GND_153 K17 VDDC_7 GND_63 L15 M1 A_RX2P 0.1uF 0.1uF G11 W16 K18 VDDC_8 GND_64 L16 K3 A_RXCN LINEOUT_L0 T1 16V GND_22 GND_154 K19 VDDC_9 GND_65 M8 K1 A_RXCP LINEOUT_R0 U3 16V G12 W17 L20 VDDC_10 GND_66 M9 M5 DDCDA_CK LINEOUT_L2 W3 GND_23 GND_155 L17 VDDC_11 GND_67 M10 M6 DDCDA_DA LINEOUT_R2 Y3 G13 W18 L18 VDDC_12 GND_68 M12 T4 HOTPLUGA GND_24 GND_156 L19 VDDC_13 GND_69 M13 G14 Y8 N18 VDDC_14 GND_70 M14 VAG V2 GND_25 GND_157 T18 AVDDL_MOD GND_71 M15 G2 B_RX0N AVSS_VRM_ADC U2 G15 Y9 AVDDL_DVI GND_72 M16 H3 B_RX0P L314 AVDD_3P3_USB GND_26 GND_158 GND_73 M17 H2 B_RX1N G16 Y10 R14 GND_74 M18 J3 B_RX1P BLM15PX121SN1 GND_27 GND_159 R15 DVDD_DDR_A_1 GND_75 M19 J2 B_RX2N G17 Y11 H12 DVDD_DDR_A_2 GND_76 M20 J1 B_RX2P GND_28 GND_160 J12 DVDD_DDR_B_1 GND_77 M21 G3 B_RXCN SPDIF_IN E21 G18 Y12 DVDD_DDR_B_2 GND_78 N9 G1 B_RXCP SPDIF_OUT D21 C376 C377 C346 GND_29 GND_161 GND_79 J4 0.1uF 0.1uF G19 Y13 GND_80 N12 K4 DDCDB_CK TUNER OPTION 0.1uF GND_30 GND_162 H17 N13 DDCDB_DA H18 VDDC_SRAM_1 GND_81 N14 V4 HOTPLUGB I2S_OUT_BCK C26 16V 16V 16V G20 Y14 VDDC_SRAM_2 GND_82 N15 I2S_OUT_MCK D25 GND_31 GND_163 H20 GND_83 N16 I2S_OUT_WS C25 BIT [6/7] EU/CIS AJJA TAIWAN/COL CHINA/HONG KOREA NORTH AMERICA BRAZIL G21 Y15 CTRL_SRAMLDO GND_84 N17 D2 D_RX0N I2S_OUT_SD D26 GND_32 GND_164 GND_85 E3 D24 G22 Y16 GND_86 N19 N20 E2 D_RX0P I2S_OUT_SD1/SDAM5 E25 0 / 0 (T2/C/S2)_EXT/ATV_CVBS (T/C)_SOC/ATV_CVBS T/C/ATV_CVBS (DTMB)_EXT/ATV_CVBS ATSC_CVBS ISDB/ATV_CVBS GND_33 GND_165 D_RX1N I2S_OUT_SD2/SCKM5 GND_87 P8 F3 D_RX1P I2S_OUT_SD3(GPIO) E24 G23 Y17 T14 T15 T16 J13 AVDD_DDR0_C AVDD_DDR0_D_1 AVDD_DDR0_D_2 GND_88 GND_89 GND_90 GND_91 P9 P12 P13 P14 F2 F1 D3 D1 D_RX2N D_RX2P D_RXCN D_RXCP I2S_IN_BCK I2S_IN_SD F22 E23 Model Option 0 / 1 1 / 0 (T2/C)_SOC/ATV_CVBS (T2/C)_SOC/ATV_IF (T2/C)_SOC/ATV_CVBS (T2/C)_SOC/ATV_IF T2/C/ATV_CVBS T/C/ATV_IF ATSC_CVBS ISDB/ATV_IF H9 H10 GND_34 GND_35 GND_166 GND_167 AA4 AA5 J14 AVDD_DDR1_C GND_92 P15 F4 DDCDD_CK I2S_IN_WS F23 GND_36 GND_168 AVDD_DDR1_D_1 GND_93 E4 1 / 1 (T2/C/S2)_SOC/ATV_CVBS T2/C/ATV_IF H11 AA6 J15 AVDD_DDR1_D_2 GND_94 P16 P17 R4 DDCDD_DA (T2/C/S2)_SOC/ATV_CVBS GND_37 GND_169 HOTPLUGD GND_95 P18 H13 AA8 GND_96 P19 DDCDC_CK(GPIO_PM) AA2 D_Demod_Core GND_38 GND_170 GND_97 P20 DDCDC_DA(GPIO_PM) AA3 +3.3V_NORMAL W_VD33 W_VDD H14 AA9 A8 GND_98 R7 L5 ARC0 GND_39 GND_171 AVDD04_DDR_B GND_99 G4 +3.3V_SB H15 AA13 AF7 B8 AVDD04_DDR_A GND_100 R8 R9 CEC B20 T2/S2 T2/S2 GND_40 GND_172 GPIO2/EJ_TCK AE7 AVDD11_DDR_B GND_101 R12 GPIO3/EJ_TMS D22 L302 L304 H16 AB1 AVDD11_DDR_A GND_102 R13 H5 GPIO_PM[13]/MHL_CBUS GPIO4/EJ_TDI D20 GND_41 GND_173 GND_103 R16 H6 GPIO_PM[14]/MHL_VBUS_EN GPIO5/EJ_TDO D23 BLM15PX121SN1 BLM15PX121SN1 J8 AC7 GND_42 DDR_LH57_512MB G7 GND_104 R17 GND_174 AVDD_PLL GND_105 J9 AC10 EXT_EEPROM L7 R18 H7 AVDD_MOD GND_106 R19 GND_43 GND_175 VDDP GND_107 C333 C343 C301 C306 C326 C335 J10 AC13 Brazil T3 GND_108 T8 0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF GND_44 GND_176 J11 BIT0_1 R300 4.7K BIT1_1 R304 4.7K BIT2_1 R309 4.7K BIT3_1 R311 4.7K BIT4_1 R314 4.7K BIT5_1 R315 4.7K BIT6_1 R317 4.7K BIT7_1 R319 4.7K R321 4.7K R323 4.7K R325 4.7K AC16 R327 4.7K R341 4.7K R343 4.7K OPT GND_109 OPT 10V OPT T9 U7 GND_110 T10 16V 16V 16V 16V 16V GND_45 GND_177 AVDD3P3_ETH GND_111 T2/S2 T2/S2 T2/S2 T2/S2 J16 AD6 P7 AB7 AVDD3P3_ADC GND_112 T11 T12 T2/S2 T2/S2 GND_46 GND_178 T7 AVDD3P3_DADC GND_113 T13 K7 AD7 AVDD_AU33 GND_114 GND_47 GND_179 AA7 N7 AVDD3P3_DMPLL GND_115 T17 T19 AREA OPTION K8 AD17 N8 AVDD3P3_USB_1 GND_116 T20 GND_48 GND_180 Y7 AVDD3P3_USB_2 GND_117 U8 K9 AD18 AVDD_NODIE GND_118 U9 GND_49 GND_181 GND_119 K10 AD22 D4 AVDD_5V_HDMI_D GND_120 U10 BIT0 GND_50 GND_182 U11 GND_121 U12 K11 AD24 GND_122 U13 BIT1 MODEL_OPT_8 GND_51 GND_183 R20 GND_123 U14 MCP K12 AE2 VSENSE_VDD GND_124 U15 IC101-*1 GND_52 GND_184 GND_125 LGE6321(MSD93F2GW, w/ T2S2 : M2) MODEL_OPT_9 K13 AE6 GND_126 U16 BIT2 GND_53 GND_185 AB5 U17 NC_21 GND_127 K14 AF10 AC5 NC_22 GND_128 U18 MODEL_OPT_10 GND_54 GND_186 GND_129 U19 P3 RIN0P TN A5 BIT3 K15 AF13 U20 N2 B5 Y18 GND_130 V7 GIN0M TP GND_55 GND_187 VDDP_3318 GND_131 V8 N1 GIN0P RN B6 BIT4 MODEL_OPT_11 K16 AF16 N3 A6 GND_132 V9 BIN0P RP C22 GND_56 GND_188 GND_133 GPIO19(LAN_LED[0])/ET_COL V10 A11 GND_134 V11 P5 HSYNC0 GPIO20(LAN_LED[1])/ET_TX_TXD1 B21 BIT5 MODEL_OPT_12 N6 GND_3 GND_135 VSYNC0 A14 V12 GND_4 GND_136 A17 GND_5 GND_137 V13 GPIO21/ET_TXD0 A21 BIT6 MODEL_OPT_13 B7 V14 R1 C20 GND_6 GND_138 RIN1P GPIO22/ET_TX_EN C6 V15 R2 C21 GND_7 GND_139 GIN1M GPIO23/ET_TX_CLK C7 GND_8 GND_140 V16 R3 GIN1P GPIO24/ET_RXD0 B22 BIT7 C8 V17 P2 B23 DDR_LH60/DDR_LH57_1GB GND_9 GND_141 BIN1P GPIO25/ET_MDC C9 V18 U5 C23 GND_10 GND_142 HSYNC1 GPIO26/ET_MDIO C19 V19 U6 A22 GND_11 GND_143 VSYNC1 GPIO27/ET_RXD1 D14 V20 GND_12 GND_144 D17 W7 W4 DDR_1GB/512MB GND_13 GND_145 NC_18 E9 W8 Non_Brazil INT_EEPROM T2 P6 GND_14 GND_146 NC_19 DM_P0 F9 W9 N5 GND_15 GND_147 DP_P0 F10 W10 BIT0_0 R301 4.7K BIT1_0 R305 4.7K BIT2_0 R310 4.7K BIT3_0 R312 4.7K BIT4_0 R313 4.7K BIT5_0 R316 4.7K BIT6_0 R318 4.7K BIT7_0 R320 4.7K R322 4.7K R324 4.7K R326 4.7K R328 4.7K R342 4.7K R344 4.7K W6 R5 GND_16 GND_148 VCOM DM_P1 F11 W11 R6 GND_17 GND_149 DP_P1 G6 W12 W5 A24 GND_18 GND_150 CVBS0 DM_P2 G8 W13 Y6 B24 GND_19 GND_151 CVBS1 DP_P2 G9 W14 V5 T6 GND_20 GND_152 CVBS2 DM_P3 G10 W15 T5 GND_21 GND_153 DP_P3 G11 W16 GND_22 GND_154 G12 W17 V6 GND_23 GND_155 CVBS_OUT1 G13 W18 Y5 GND_24 GND_156 NC_20 G14 Y8 GND_25 GND_157 G15 Y9 GND_26 GND_158 G16 Y10 GND_27 GND_159 G17 Y11 GND_28 GND_160 G18 Y12 GND_29 GND_161 G19 Y13 GND_30 GND_162 G20 Y14 GND_31 GND_163 G21 Y15 GND_32 GND_164 G22 Y16 GND_33 GND_165 G23 Y17 GND_34 GND_166 H9 GND_35 GND_167 AA4 AREA OPTION BACK-END OPTION H10 H11 GND_36 GND_168 AA5 AA6 LH60 DDR OPTION DDR Brazil OPT_LH60/LH57 COMMON GND_37 GND_169 H13 H14 GND_38 GND_170 AA8 AA9 BIT [0/1] DVB ATSC JP BIT[2/3/4/5] TYPE FHD FRC PANEL TYPE GND_39 GND_171 H15 AA13 GND_40 GND_172 H16 AB1 0 / 0 EU/CIS N/AMERICA 0 / 0 / 0 / 0 LVDS FHD, 60Hz J8 J9 GND_41 GND_42 GND_173 GND_174 AC7 AC10 MODEL_OPT_8 / MODEL_OPT_12 DDR MODEL_OPT_9 DDR Country OPT J10 GND_43 GND_175 AC13 0 / 1 CHINA/HONGKONG KOREA JAPAN 0 / 0 / 0 / 1 EPI FHD, 120Hz, v14_32inch (6 lane) GND_44 GND_176 J11 AC16 GND_45 GND_177 J16 AD6 TAIWAN/COLOM 0 / 0 / 1 / 0 EPI FHD, 120Hz, V13 (6 lane) K7 GND_46 GND_47 GND_178 GND_179 AD7 1 / 0 S/AMERCIA 0 / 0 1GB 0 Non Brazil K8 AD17 K9 GND_48 GND_180 AD18 1 / 1 ASIA/AFRICA 0 / 0 / 1 / 1 EPI FHD, 120Hz, V12 (6 lane) GND_49 GND_181 K10 AD22 GND_50 GND_182 K11 AD24 0 / 1 / 0 / 0 EPI FHD, 60Hz, V14_32 inch (6lane) K12 K13 GND_51 GND_52 GND_183 GND_184 AE2 AE6 1 / 0 768MB 1 Brazil K14 GND_53 GND_185 AF10 0 / 1 / 0 / 1 LVDS FHD, 120Hz GND_54 GND_186 K15 AF13 GND_55 GND_187 K16 AF16 0 / 1 / 1 / 0 EPI FHD, 120Hz, V14 (8 lane) GND_56 GND_188 0 / 1 - 0 / 1 / 1 / 1 LVDS HD, 60Hz 1 / 0 / 0 / 0 LVDS FHD, 60Hz, CP BOX 1 / 1 - 1 / 0 / 0 / 1 LVDS HD, 60Hz SMALL SMART 1 / 0 / 1 / 0 Vby1 FHD, 120Hz OLED LH57 DDR OPTION 1 / 0 / 1 / 1 LVDS FHD, 120Hz OLED 1 / 1 / 0 / 0 1 / 1 / 0 / 1 MODEL_OPT_8 / MODEL_OPT_13 DDR 1 / 1 / 1 / 0 1 / 1 / 1 / 1 0 / 0 1GB 1 / 0 768MB 0 / 1 512MB 1 / 1 - THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 16Y_M2 2015.10.02 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN2 3 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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+1.5V_DDR +1.5V_DDR_0 +1.5V_DDR +1.5V_DDR_1 L501 L503 BLM15PX121SN1 BLM15PX121SN1 +1.5V_DDR_1 +1.5V_DDR_0 OPT OPT OPT C548 C549 C550 C551 C552 C553 C554 MCP OPT 10uF C501 C503 C505 C512 C514 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF IC101-*1 C507 C509 10V LGE6321(MSD93F2GW, w/ T2S2 : M2) 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 10uF 10V AE9 F14 A-A0 B-A0 AB8 B12 A-A1 B-A1 AE11 E11 A-A2 B-A2 AE12 E10 A-A3 B-A3 AC9 C13 A-A4 B-A4 AD12 D11 A-A5 B-A5 AB9 A12 A-A6 B-A6 AF11 F13 A-A7 B-A7 AA10 C12 A-A8 B-A8 AE10 E12 A-A9 B-A9 AA11 C10 AB10 A-A10 B-A10 B11 +1.5V_DDR_1 A-A11 B-A11 AA12 B10 AD10 A-A12 B-A12 D12 +1.5V_DDR_0 A-A13 B-A13 AB11 C11 A-A14 B-A14 AD13 D10 A-BA0 B-BA0 AC8 B13 A-BA1 B-BA1 AD9 A-BA2 B-BA2 E13 C523 C526 C527 C528 C529 C530 C531 AB12 B9 A-RASZ B-RASZ C516 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 10uF AF8 A-CASZ B-CASZ F15 C500 C502 C506 C508 C510 C515 AE8 E14 10uF 10V AC12 A-WEZ B-WEZ A9 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF A-ODT B-ODT AD8 A-CKE B-CKE C14 10V AD11 F12 A-RST B-RST AF14 A15 A-MCLK B-MCLK AE13 B14 A-MCLKZ B-MCLKZ AB13 D9 A-CSB0 B-CSB0 AA15 F19 A-DQ[0] B-DQ[0] AB18 D15 A-DQ[1] B-DQ[1] AA14 E18 A-DQ[2] B-DQ[2] AC18 E16 A-DQ[3] B-DQ[3] AC15 E19 A-DQ[4] B-DQ[4] AA18 F16 A-DQ[5] B-DQ[5] AB15 D18 A-DQ[6] B-DQ[6] AA17 E15 A-DQ[7] B-DQ[7] AB17 E17 A-DQM[0] B-DQM[0] AA16 F18 A-DQS[0] B-DQS[0] AB16 F17 A-DQSB[0] B-DQSB[0] AE17 B16 AD15 A-DQ[8] B-DQ[8] A18 +1.5V_DDR_0 +1.5V_DDR_1 A-DQ[9] B-DQ[9] AE18 B15 A-DQ[10] B-DQ[10] AD14 A19 A-DQ[11] B-DQ[11] AF17 C16 A-DQ[12] B-DQ[12] AE14 B19 A-DQ[13] B-DQ[13] AF18 C15 A-DQ[14] B-DQ[14] AE15 B18 AB14 A-DQ[15] B-DQ[15] D19 C511 C518 C521 C524 C532 C537 C540 C543 C559 C561 A-DQM[1] B-DQM[1] AE16 A-DQS[1] B-DQS[1] C17 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF AD16 B17 A-DQSB[1] B-DQSB[1] +1.5V_DDR_0 +1.5V_DDR_1 C504 C513 C522 C525 C533 C536 C539 C546 C560 C562 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF VREFCA2 VREFCA1 IC502 IC501 H5TQ4G63CFR-TEC NON-MCP VREFCA4 H5TQ4G63CFR-TEC VREFCA3 IC101 LGE6322(MSD93F2G, w/oT2S2 : M2) DDR3 Near DRAM Near DRAM DDR3 N3 4Gbit M8 RB0 A0 VREFCA N3 A0 4Gbit M8 Near DRAM Near DRAM P7 A1 (x16) +1.5V_DDR_1 +1.5V_DDR_1 RA0 VREFCA RB1 AE9 F14 P7 A1 (x16) +1.5V_DDR_0 +1.5V_DDR_0 P3 A2 RA0 A-A0 RB0 RA1 RB2 B-A0 P3 R505 56 N2 H1 AB8 B12 RA2 A2 RB3 A3 RA1 A-A1 B-A1 RB1 VREFDQ AE11 E11 N2 H1 P8 RA3 A3 VREFDQ RB4 A4 RA2 A-A2 B-A2 RB2 P8 P2 +1.5V_DDR_1 VREFCA2 VREFCA4 AE12 E10 RA4 A4 RB5 A5 RA3 A-A3 B-A3 RB3 R507 AC9 C13 P2 +1.5V_DDR_0 R8 L8 RA4 A-A4 B-A4 RB4 RA5 A5 R504 VREFCA1 VREFCA3 RB6 A6 ZQ AD12 D11 R501 56 R8 L8 R517 56 R2 240 RA6 A6 ZQ RB7 A7 RA5 A-A5 B-A5 RB5 R2 T8 1% AB9 A12 A7 240 A8 RA7 RB8 R506 R515 1K 1% 1K 1% RA6 A-A6 B-A6 RB6 T8 1% R3 B2 AF11 F13 RA8 A8 RB9 A9 RA7 A-A7 B-A7 RB7 VDD_1 R3 B2 L7 D9 R502 R513 1K 1% 1K 1% AA10 C12 RA9 A9 RB10 A10/AP RA8 A-A8 B-A8 RB8 VDD_1 VDD_2 AE10 E12 L7 D9 R7 G7 RA10 A10/AP VDD_2 RB11 A11 VDD_3 RA9 A-A9 B-A9 RB9 R7 G7 N7 K2 AA11 C10 RA11 A11 RB12 A12/BC RA10 A-A10 B-A10 RB10 VDD_3 VDD_4 AB10 B11 N7 K2 T3 K8 A12/BC A13 1% 1% RA11 RB11 RA12 VDD_4 RB13 VDD_5 A-A11 B-A11 T3 K8 T7 N1 C541 C558 AA12 B10 R508 R516 A13 A14 C538 C557 DDR_HYNIX_4Gb RA12 RB12 RA13 VDD_5 RB14 VDD_6 1000pF 1000pF A-A12 B-A12 1% 1% AD10 D12 T7 N1 M7 N9 0.1uF 0.1uF RA14 A14 VDD_6 C547 C556 NC_5 VDD_7 50V 50V RA13 RB13 R503 R514 1K 1K A-A13 B-A13 M7 N9 C517 C555 R1 AB11 C11 NC_5 1000pF 1000pF RA14 A-A14 B-A14 RB14 VDD_7 0.1uF 0.1uF VDD_8 AD13 D10 R1 1K 50V 50V M2 R9 1K ARBA0 BRBA0 VDD_8 BRBA0 BA0 VDD_9 A-BA0 B-BA0 M2 R9 N8 AC8 B13 ARBA0 BA0 BRBA1 BA1 ARBA1 A-BA1 B-BA1 BRBA1 VDD_9 DDR_HYNIX_4Gb AD9 E13 N8 R518 56 M3 ARBA2 BRBA2 ARBA1 BA1 BRBA2 BA2 A-BA2 B-BA2 M3 A1 AB12 B9 ARBA2 BA2 A/RRAS A-RASZ B-RASZ B/RRAS VDDQ_1 AF8 F15 A1 J7 A8 A/RCAS B/RCAS VDDQ_1 BRCLK0 CK VDDQ_2 A-CASZ B-CASZ J7 A8 K7 C1 AE8 E14 ARCLK0 CK B/RCLK0 CK A/RWE A-WEZ B-WEZ B/RWE VDDQ_2 VDDQ_3 AC12 A9 K7 C1 K9 C9 ARODT BRODT A/RCLK0 CK VDDQ_3 BRCKE CKE VDDQ_4 A-ODT B-ODT K9 C9 D2 AD8 C14 ARCKE CKE ARCKE A-CKE B-CKE BRCKE VDDQ_4 VDDQ_5 AD11 F12 D2 L2 E9 ARRESET BRRESET VDDQ_5 B/RCSD CS VDDQ_6 A-RST B-RST L2 E9 K1 F1 AF14 A15 A/RCS CS BRODT ODT ARCLK0 A-MCLK B-MCLK BRCLK0 VDDQ_6 VDDQ_7 AE13 B14 K1 F1 J3 H2 C534 1uF A/RCLK0 B/RCLK0 ARODT ODT VDDQ_7 B/RRAS RAS VDDQ_8 A-MCLKZ B-MCLKZ J3 H2 C519 1uF +1.5V_DDR_0 K3 H9 C535 1uF +1.5V_DDR_1 AB13 D9 A/RRAS RAS B/RCAS CAS ARDQ[0-7] A/RCS A-CSB0 B-CSB0 B/RCSD BRDQ[0-7] VDDQ_8 VDDQ_9 ARDQ[0] AA15 F19 BRDQ[0] K3 H9 C520 1uF R519 56 L3 A/RCAS CAS VDDQ_9 B/RWE WE ARDQ[1] A-DQ[0] B-DQ[0] BRDQ[1] L3 J1 AB18 D15 A/RWE WE A-DQ[1] B-DQ[1] NC_1 ARDQ[2] AA14 E18 BRDQ[2] J1 T2 J9 NC_1 BRRESET RESET NC_2 ARDQ[3] A-DQ[2] B-DQ[2] BRDQ[3] T2 J9 L1 AC18 E16 1% ARRESET RESET NC_2 NC_3 1K ARDQ[4] A-DQ[3] B-DQ[3] BRDQ[4] L1 L9 1% R563 AC15 E19 1K A-DQ[4] B-DQ[4] NC_3 NC_4 R509 ARDQ[5] AA18 F16 BRDQ[5] L9 F3 NC_4 BRDQS0 DQSL ARDQ[6] A-DQ[5] B-DQ[5] BRDQ[6] F3 ARRESET G3 AB15 D18 ARDQS0 DQSL B/RDQS0 DQSL ARDQ[7] A-DQ[6] B-DQ[6] BRDQ[7] G3 BRRESET AA17 E15 A/RDQS0 DQSL A-DQ[7] B-DQ[7] ARCKE C7 A9 AB17 E17 BRDQS1 DQSU ARDQM0 A-DQM[0] B-DQM[0] BRDQM0 VSS_1 BRCKE C7 A9 B7 B3 1K 1% AA16 F18 R565 ARDQS0 BRDQS0 ARDQS1 DQSU VSS_1 B/RDQS1 DQSU VSS_2 1% R510 1K A-DQS[0] B-DQS[0] B7 B3 E1 ARDQ[8-15] AB16 F17 BRDQ[8-15] A/RDQS1 DQSU VSS_2 VSS_3 ARDQ[8] A/RDQS0 AE17 A-DQSB[0] B-DQSB[0] B16 B/RDQS0 BRDQ[8] E1 E7 G8 VSS_3 BRDQM0 DML VSS_4 ARDQ[9] A-DQ[8] B-DQ[8] BRDQ[9] E7 G8 BRDQ[0-7] D3 J2 AD15 A18 ARDQM0 DML BRDQM1 DMU A-DQ[9] B-DQ[9] VSS_4 VSS_5 ARDQ[10] AE18 B15 BRDQ[10] ARDQ[0-7] D3 J2 J8 ARDQM1 DMU VSS_5 BRDQ[0] VSS_6 ARDQ[11] A-DQ[10] B-DQ[10] BRDQ[11] J8 E3 M1 AD14 A19 DQL0 A-DQ[11] B-DQ[11] ARDQ[0] VSS_6 BRDQ[1] VSS_7 ARDQ[12] AF17 C16 BRDQ[12] E3 M1 ARCLK0 F7 M9 A-DQ[12] B-DQ[12] ARDQ[1] DQL0 VSS_7 BRDQ[2] DQL1 VSS_8 ARDQ[13] AE14 B19 BRDQ[13] F7 M9 F2 P1 BRCLK0 ARDQ[2] DQL1 VSS_8 A/RCLK0 BRDQ[3] DQL2 VSS_9 ARDQ[14] A-DQ[13] B-DQ[13] BRDQ[14] F2 P1 F8 P9 AF18 C15 B/RCLK0 A-DQ[14] B-DQ[14] ARDQ[3] DQL2 VSS_9 BRDQ[4] DQL3 VSS_10 ARDQ[15] AE15 B18 BRDQ[15] F8 P9 H3 T1 1% 1% A-DQ[15] B-DQ[15] ARDQ[4] DQL3 VSS_10 BRDQ[5] DQL4 VSS_11 R559 R560 AB14 D19 H3 T1 H8 T9 56 56 DQL4 VSS_11 DQL5 VSS_12 R511 R512 ARDQM1 BRDQM1 ARDQ[5] BRDQ[6] 1% 1% A-DQM[1] B-DQM[1] H8 T9 G2 56 56 AE16 C17 DQL5 VSS_12 BRDQ[8-15] DQL6 ARDQS1 A-DQS[1] B-DQS[1] BRDQS1 ARDQ[6] G2 BRDQ[7] H7 AD16 B17 ARDQ[8-15] DQL6 DQL7 A/RDQS1 A-DQSB[1] B-DQSB[1] B/RDQS1 ARDQ[7] H7 B1 DQL7 BRDQ[8] VSSQ_1 B1 D7 B9 ARDQ[8] VSSQ_1 C544 BRDQ[9] DQU0 VSSQ_2 D7 B9 C3 D1 ARDQ[9] DQU0 VSSQ_2 0.01uF BRDQ[10] DQU1 VSSQ_3 C545 C3 D1 50V C8 D8 0.01uF ARDQ[10] DQU1 VSSQ_3 BRDQ[11] DQU2 VSSQ_4 C8 D8 C2 E2 50V ARDQ[11] DQU2 VSSQ_4 BRDQ[12] DQU3 VSSQ_5 C2 E2 A7 E8 ARDQ[12] DQU3 VSSQ_5 BRDQ[13] DQU4 VSSQ_6 A7 E8 A2 F9 ARDQ[13] DQU4 VSSQ_6 BRDQ[14] DQU5 VSSQ_7 A2 F9 B8 G1 ARDQ[14] DQU5 VSSQ_7 BRDQ[15] DQU6 VSSQ_8 B8 G1 A3 G9 ARDQ[15] DQU6 VSSQ_8 DQU7 VSSQ_9 A3 G9 DQU7 VSSQ_9 IC502-*1 IC502-*2 IC502-*3 K4B4G1646E-BCNB H5TQ2G63GFR-TEC K4B2G1646Q-BCNB IC501-*1 K4B4G1646E-BCNB IC501-*2 IC501-*3 N3 M8 N3 M8 N3 M8 H5TQ2G63GFR-TEC K4B2G1646Q-BCNB A0 VREFCA A0 VREFCA A0 VREFCA P7 P7 P7 A1 A1 A1 P3 P3 P3 N3 M8 A2 A2 A2 A0 VREFCA N2 H1 N2 H1 N2 H1 P7 N3 M8 N3 M8 A3 VREFDQ A3 VREFDQ A3 VREFDQ A1 A0 VREFCA A0 VREFCA P8 P8 P8 P3 P7 P7 A4 A4 A4 A2 A1 A1 P2 P2 P2 N2 H1 P3 P3 A5 A5 A5 A3 VREFDQ A2 A2 R8 L8 R8 L8 R8 L8 P8 N2 H1 N2 H1 A6 ZQ A6 ZQ A6 ZQ A4 A3 VREFDQ A3 VREFDQ R2 R2 R2 P2 P8 P8 A7 A7 A7 A5 A4 A4 T8 T8 T8 R8 L8 P2 P2 A8 A8 A8 A6 ZQ A5 A5 R3 B2 R3 B2 R3 B2 R2 R8 L8 R8 L8 A9 VDD_1 A9 VDD_1 A9 VDD_1 A7 A6 ZQ A6 ZQ L7 D9 L7 D9 L7 D9 T8 R2 R2 A10/AP VDD_2 A10/AP VDD_2 A10/AP VDD_2 A8 A7 A7 R7 G7 R7 G7 R7 G7 R3 B2 T8 T8 A11 VDD_3 A11 VDD_3 A11 VDD_3 A9 VDD_1 A8 A8 N7 K2 N7 K2 N7 K2 L7 D9 R3 B2 R3 B2 A12/BC VDD_4 A12/BC VDD_4 A12/BC VDD_4 DDR_SAMSUNG_4Gb DDR_SAMSUNG_2Gb A10/AP VDD_2 A9 VDD_1 A9 VDD_1 T3 K8 T3 K8 T3 K8 R7 G7 L7 D9 L7 D9 A13 VDD_5 A13 VDD_5 A13 VDD_5 A11 VDD_3 A10/AP VDD_2 A10/AP VDD_2 T7 N1 T7 N1 N1 N7 K2 R7 G7 R7 G7 A14 VDD_6 A14 VDD_6 VDD_6 DDR_HYNIX_2Gb A12/BC VDD_4 A11 VDD_3 A11 VDD_3 M7 N9 M7 N9 M7 N9 DDR_SAMSUNG_4Gb T3 K8 N7 K2 N7 K2 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 A13 VDD_5 A12/BC VDD_4 A12/BC VDD_4 R1 R1 R1 DDR_SAMSUNG_2Gb T7 N1 T3 K8 T3 K8 VDD_8 VDD_8 VDD_8 A14 VDD_6 A13 VDD_5 A13 VDD_5 M2 R9 M2 R9 M2 R9 M7 N9 T7 N1 N1 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 NC_5 VDD_7 A14 VDD_6 VDD_6 N8 N8 N8 DDR_HYNIX_2Gb R1 M7 N9 M7 N9 BA1 BA1 BA1 VDD_8 NC_5 VDD_7 NC_5 VDD_7 M3 M3 M3 M2 R9 R1 R1 BA2 BA2 BA2 BA0 VDD_9 VDD_8 VDD_8 A1 A1 A1 N8 M2 R9 M2 R9 VDDQ_1 VDDQ_1 VDDQ_1 BA1 BA0 VDD_9 BA0 VDD_9 J7 A8 J7 A8 J7 A8 M3 N8 N8 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 BA2 BA1 BA1 K7 C1 K7 C1 K7 C1 A1 M3 M3 CK VDDQ_3 CK VDDQ_3 CK VDDQ_3 VDDQ_1 BA2 BA2 K9 C9 K9 C9 K9 C9 J7 A8 A1 A1 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CK VDDQ_2 VDDQ_1 VDDQ_1 D2 D2 D2 K7 C1 J7 A8 J7 A8 VDDQ_5 VDDQ_5 VDDQ_5 CK VDDQ_3 CK VDDQ_2 CK VDDQ_2 L2 E9 L2 E9 L2 E9 K9 C9 K7 C1 K7 C1 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CKE VDDQ_4 CK VDDQ_3 CK VDDQ_3 K1 F1 K1 F1 K1 F1 D2 K9 C9 K9 C9 ODT VDDQ_7 ODT VDDQ_7 ODT VDDQ_7 VDDQ_5 CKE VDDQ_4 CKE VDDQ_4 J3 H2 J3 H2 J3 H2 L2 E9 D2 D2 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 CS VDDQ_6 VDDQ_5 VDDQ_5 K3 H9 K3 H9 K3 H9 K1 F1 L2 E9 L2 E9 CAS VDDQ_9 CAS VDDQ_9 CAS VDDQ_9 ODT VDDQ_7 CS VDDQ_6 CS VDDQ_6 L3 L3 L3 J3 H2 K1 F1 K1 F1 WE WE WE RAS VDDQ_8 ODT VDDQ_7 ODT VDDQ_7 J1 J1 J1 K3 H9 J3 H2 J3 H2 NC_1 NC_1 NC_1 CAS VDDQ_9 RAS VDDQ_8 RAS VDDQ_8 T2 J9 T2 J9 T2 J9 L3 K3 H9 K3 H9 RESET NC_2 RESET NC_2 RESET NC_2 WE CAS VDDQ_9 CAS VDDQ_9 L1 L1 L1 J1 L3 L3 NC_3 NC_3 NC_3 NC_1 WE WE L9 L9 L9 T2 J9 J1 J1 NC_4 NC_4 NC_4 RESET NC_2 NC_1 NC_1 F3 F3 F3 T7 L1 T2 J9 T2 J9 DQSL DQSL DQSL NC_6 NC_3 RESET NC_2 RESET NC_2 G3 G3 G3 L9 L1 L1 DQSL DQSL DQSL NC_4 NC_3 NC_3 F3 L9 L9 DQSL NC_4 NC_4 C7 A9 C7 A9 C7 A9 G3 F3 F3 T7 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSL DQSL DQSL NC_6 B7 B3 B7 B3 B7 B3 G3 G3 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSL DQSL E1 E1 E1 C7 A9 VSS_3 VSS_3 VSS_3 DQSU VSS_1 E7 G8 E7 G8 E7 G8 B7 B3 C7 A9 C7 A9 DML VSS_4 DML VSS_4 DML VSS_4 DQSU VSS_2 DQSU VSS_1 DQSU VSS_1 D3 J2 D3 J2 D3 J2 E1 B7 B3 B7 B3 DMU VSS_5 DMU VSS_5 DMU VSS_5 VSS_3 DQSU VSS_2 DQSU VSS_2 J8 J8 J8 E7 G8 E1 E1 VSS_6 VSS_6 VSS_6 DML VSS_4 VSS_3 VSS_3 E3 M1 E3 M1 E3 M1 D3 J2 E7 G8 E7 G8 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DMU VSS_5 DML VSS_4 DML VSS_4 F7 M9 F7 M9 F7 M9 J8 D3 J2 D3 J2 DQL1 VSS_8 DQL1 VSS_8 DQL1 VSS_8 VSS_6 DMU VSS_5 DMU VSS_5 F2 P1 F2 P1 F2 P1 E3 M1 J8 J8 DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 DQL0 VSS_7 VSS_6 VSS_6 F8 P9 F8 P9 F8 P9 F7 M9 E3 M1 E3 M1 DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10 DQL1 VSS_8 DQL0 VSS_7 DQL0 VSS_7 H3 T1 H3 T1 H3 T1 F2 P1 F7 M9 F7 M9 DQL4 VSS_11 DQL4 VSS_11 DQL4 VSS_11 DQL2 VSS_9 DQL1 VSS_8 DQL1 VSS_8 H8 T9 H8 T9 H8 T9 F8 P9 F2 P1 F2 P1 DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 DQL3 VSS_10 DQL2 VSS_9 DQL2 VSS_9 G2 G2 G2 H3 T1 F8 P9 F8 P9 DQL6 DQL6 DQL6 DQL4 VSS_11 DQL3 VSS_10 DQL3 VSS_10 H7 H7 H7 H8 T9 H3 T1 H3 T1 DQL7 DQL7 DQL7 DQL5 VSS_12 DQL4 VSS_11 DQL4 VSS_11 B1 B1 B1 G2 H8 T9 H8 T9 VSSQ_1 VSSQ_1 VSSQ_1 DQL6 DQL5 VSS_12 DQL5 VSS_12 D7 B9 D7 B9 D7 B9 H7 G2 G2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQL7 DQL6 DQL6 C3 D1 C3 D1 C3 D1 B1 H7 H7 DQU1 VSSQ_3 DQU1 VSSQ_3 DQU1 VSSQ_3 VSSQ_1 DQL7 DQL7 C8 D8 C8 D8 C8 D8 D7 B9 B1 B1 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU0 VSSQ_2 VSSQ_1 VSSQ_1 C2 E2 C2 E2 C2 E2 C3 D1 D7 B9 D7 B9 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU3 VSSQ_5 DQU1 VSSQ_3 DQU0 VSSQ_2 DQU0 VSSQ_2 A7 E8 A7 E8 A7 E8 C8 D8 C3 D1 C3 D1 DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 DQU2 VSSQ_4 DQU1 VSSQ_3 DQU1 VSSQ_3 A2 F9 A2 F9 A2 F9 C2 E2 C8 D8 C8 D8 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU3 VSSQ_5 DQU2 VSSQ_4 DQU2 VSSQ_4 B8 G1 B8 G1 B8 G1 A7 E8 C2 E2 C2 E2 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU4 VSSQ_6 DQU3 VSSQ_5 DQU3 VSSQ_5 A3 G9 A3 G9 A3 G9 A2 F9 A7 E8 A7 E8 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU5 VSSQ_7 DQU4 VSSQ_6 DQU4 VSSQ_6 B8 G1 A2 F9 A2 F9 DQU6 VSSQ_8 DQU5 VSSQ_7 DQU5 VSSQ_7 A3 G9 B8 G1 B8 G1 DQU7 VSSQ_9 DQU6 VSSQ_8 DQU6 VSSQ_8 A3 G9 A3 G9 DQU7 VSSQ_9 DQU7 VSSQ_9 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 16Y_M2 2015.10.02 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR 5 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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LED DRIVER BLOCK +19V D601 L602 BR210 33uH 100V OPT C619 C623 C626 47uF 10uF 0.1uF 25V 25V 50V C628 OPT C629 100V 100V IC601 +3.3V_NORMAL 220pF 220pF R623 MP3378E [EP]GND 100 PWM_DIM C614 R622 R635 R636 R637 1000pF 100K 22 22 22 GND1 PWM 1 28 50V R630 OPT R613 R616 THERMAL 3K 20K 200K R628 29 1% 1% OSC EN1 1K +3.3V_NORMAL 2 27 INV_CTL C617 4700pF C620 R627 R614 R617 ISET COMP 50V 1000pF 100K 3 26 50V R608 Close to IC 10K 560 6.8K C611 1% 1% ADIM VCC1 16V +19V 4 25 1uF R621 C618 270 0.47uF OPT 50V 1% C601 0.1uF LED4 VIN1 C613 5 24 1uF 50V D 25V R629 LED3 GATE 10 Q602 6 23 G AOD2922 R633 S LED2 ISENSE 100 7 22 R631 R634 LED1 SYNC 5.1K 0.1 8 21 1% R611 1W OVP BST C622 270K R632 9 20 1000pF Close to IC 50V 10K 1/8W 1% C606 NC_1 AGND ZD601 R612 C 8.2K 1000pF 10 19 33V NPN_KEC OPT B Q601-*1 1% 50V NC_2 GND2_2 R620 +3.4V_ST 11 18 100 E +12V FB GND2_1 C615 R607 12 17 0.1uF +3.4V_ST 10K 50V L601 R609 15uH 10K EN2 SW R638 13 16 10K +19V C R624 C621 C624 C625 C627 OPT OPT OPT R640 C604 R615 VCC2 VIN2 Close to IC 33K 10uF 10uF 10uF 0.1uF B Close to IC 14 15 RL_ON 0.1uF 47K 1% 16V 16V 16V 16V Q601 C612 C616 10K 16V C608 10uF P600 R639 NPN_NXP 0.1uF 1uF E 25V R625 SMAW200-04 10K 16V 25V 5.1K R619 1% 51K R610 1 10K POWER_ON/OFF2_3 R626 2.7K OPT 1% 2 3 4 VOUT#2 C603 C605 C607 C602 R618 33uF 4.7uF 4.7uF 100K 1uF 100V 50V 50V 50V 1/8W OPT R641 R642 1/10W 1/10W 1 1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M2 2015/07/17 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LED_DRIVER 6 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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POWER FROM ADAPTOR 19V +19V to +3.5V_STANDBY PANEL_POWER Power_DET Q2302 Change: Diodes --> NXP 131118 +19V R2339 100K +3.4V_ST IC402 +12V MP2315GJ R478 +3.4V_ST PANEL_VCC +19V 100K Toshiba_1st R2327 P_DET_DIODES_1st IC2306 OPT R2345 R471 R485 Q2302 22K L2307 APX803E29 10K JK400 39K AAM FB 56K 1% SSM3J332R KJA-DC-1-0032 JP402 JP-BLOCK-DC_JACK 1/16W 1 3A 8 UBW2012-121F 1/16W VCC 3 2 RESET R2344 100 D POWER_DET S 1% CYNTEC_2nd AOS_2nd 4 4 19V IN VCC L471-*1 Q2302-*1 2 7 4.7uH LVDS_DISCHARGE 1 C2359 TDK_1st AO3435 R2328 C2344 L471 C2321 R2318 C2326 R2321 C2333 C2334 GND 0.1uF GND 5.1K PESD5V0S1UA S D 0.1uF G C471 C473 C474 4.7uH 2013.08.07 0.1uF 0.1uF 3.3K 10uF 10uF 16V 2 2 D471 68uF 10uF 0.1uF SW EN/SYNC 50V 36K 1% 25V 3 6 5.6B->5V 50V 25V 25V 20V 35V 25V 25V READY->APPLY 1/16W OPT OPT G R486 TVS_NXP_1st P_DET_KEC_2nd not to RESET at 8kV ESD 1 1 GND BST C482 C484 C487 C489 C492 C493 C485 4 5 20130528 cJ.LIM 0.1uF IC2306-*1 10uF 10uF 10uF 10uF 10uF 10uF 560 D470 10V 10V 10V 10V 10V 10V 25V 5V R2319 C479 1% KIC7529M2 R477 R479 150K 68 20K 0.1uF R487 25V R2316 C VCC OUT 1.3K PANEL_CTL 10K NPN_NXP_2nd 3 2 C476 X5R => X7R 1% B Q2301 0.1uF To improve CST Issue 1 50V 2013.12.21 by GH.Song TVS_KEC_2nd OPT MMBT3904(NXP) D470-*1 R2315 C2323 GND E C R488 10K 4.7uF NPN_KEC_1st 560 10V B Q2301-*1 2N3904S 1% E +19V L2306 IC2301 MP8765GQ +1.10V_CORE BLM18PG121SN1D VIN SW_4 1 16 C2314 C2305 10uF 25V C2306 10uF 25V 0.1uF 50V PGND 2 15 SW_3 VID_CTRL NC_1 3 14 AGND Vout=0.6*(1+R1/R2) VID +3.3V_SB R2332 R2337 100K PG EN 10K 4 13 POWER_ON/OFF2_1 R2307 +3.4V_ST 47K R2320 NC_2 FB 1% 10K 5 12 VID OPT R2330 C2336 R1 R2 D R2343 D R2317 100K MODE VCC 1uF 10V R2346 R2347 6 11 510 +1.10V_VDDC G 0 C2343 8.2K 12K Q2307-*1 VID_CTRL R2331 1% 1% 2N7002KA G R2336 R2342 220pF 0 VOUT BST 4.7 820K 50V KEC_2nd S Q2307 7 10 S T2N7002AK C2337 L2310 Toshiba_1st 0.22uF 2uH C2316 SW_1 SW_2 8 9 16V 0.1uF 16V R1:8.2K/R2:12K//47K, V=1.1V(VID_CONTROL=HIGH) OPT C2346 C2348 C2360 C2361 C2363 ZD2303 10uF 10uF 10uF 10uF 10uF 2.5V R1:8.2K/R2:12K, V=1.0V(VID_CONTROL=LOW) 10V 10V 10V 10V 10V +5.0V normal & USB +12V CYNTEC_2nd L2316-*1 +5V_NORMAL +1.5V DDR 4.7uH POWER_ON/OFF2_2 +3.4V_ST OPT TDK_1st L2316 R2334 C2328 4.7uH 10K 0.1uF 16V C2329 0.1uF TDK_2nd [EP]FIN 16V L2309-*1 2.2uH +1.5V_DDR AVIN BOOT C2372 L2304 PGD 1uF C2373 C2374 C2375 C2376 EN 10V 10uF 10uF 10uF 10uF TAIYO YUDEN_1st IC2307 10V 10V 10V 10V BLM18PG121SN1D L2309 MP1471AGJ-C667 2.2uH 16 15 14 13 R2351 NR5040T2R2N 0 PVIN_1 1 12 SW_3 GND BST THERMAL 1 6 C2311 C2315 PVIN_2 SW_2 OPT 2 17 11 C2339 C2342 C2347 C2357 ZD2302 10uF 0.1uF 10uF 10uF 10uF 10uF R2352 10V 16V PGND_1 EAN62870501 SW_1 2.5V SW EN POWER_ON/OFF2_4 3 IC2302 10 10V 10V 10V 10V 10K L2317 2 5 BD9A300MUV PGND_2 4 9 SS +3.4V_ST 120-ohm IN FB 3A C2331 5 6 7 8 3 4 R2350 R2354 R2355 R1 0.01uF 50V AGND FB ITH MODE C2370 C2371 33K 33K 47K R2340 10uF 0.1uF 1/16W 1/16W 1/16W 330K 25V 25V 1% 1% 1% R2353 R2335 OPT 15K 8.2K R2341 1/16W 1% R2 1% 1/16W 330K R2348 C2338 R1 16K 2700pF 1/16W 50V 1% Vout=0.8*(1+R1/R2) R2 R2349 18K Vout=0.8*(1+R1/R2) 1/16W 1% +3.3V_NORMAL +3.4V_ST FOR DEBUG +3.3V_NORMAL +3.4V_ST +3.3V_SB +3.3V_SB L2313 +1.8V - eMMC 4.51 Toshiba_1st Q2306 +3.3V-eMMC 4.41/4.51 UBW2012-121F Toshiba_1st L2311 +3.3V_NORMAL DVDD18_EMMC UBW2012-121F SSM3J332R L2300 OPT Q2304 +3.3V_NORMAL 3.3V_EMMC D SSM3J332R S UBW2012-121F C2353 IC2300-*1 D C2352 IC2300 S R2311 C2354 C2355 C2356 10uF 0.1uF 10uF 10uF ZD2304 AZ1117EH-ADJTRG1 TJ1117GS-ADJ G 25V 22K 2.2uF 5V ZD2301 C2301 10V 10V 10V 10V C2300 C2303 R2305 C2330 C2304 L2302 5V G 10uF 0.1uF 2.2uF 10uF 10uF IN OUT VIN 3 2 VOUT 22K BLM18PG121SN1D 10V 25V 10V 10V 10V R2338 ADJ/GND 1 2.2K R2309 ADJ/GND C2302 LDO_Diodes_1st 75 R2306 C NPN_NXP_2nd 1% ZD2300 R2308 AOS_2nd C2307 C2308 C2327 10uF C2309 C2310 2.5V 2.2K POWER_ON/OFF1 OPT 10K Q2305 Q2306-*1 0.1uF 10uF 10uF 10V 10uF 10uF LDO_TAEJIN_2nd B C NPN_NXP_2nd AO3435 16V 10V 10V 10V 10V POWER_ON/OFF2_3 R2303 AOS_2nd MMBT3904(NXP) R2310 10K Q2303 Q2304-*1 S D B 33 AO3435 E C NPN_KEC_1st 1% MMBT3904(NXP) S D C B Q2305-*1 E G NPN_KEC_1st 2N3904S B Q2303-*1 Vout=1.25*(1+R2/R1)+Iadj*R2 2N3904S E G E THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M2 2015/07/07 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 23 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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Renesas MICOM For Debug +3.4V_ST 18pF C3002-*1 18pF 50V MICOM_DEBUG R3005 1K R3002 10K +3.3V_SB 15pF 50V 50V MICOM_DEBUG Don’t remove R3016, 15pF 15pF P3000 not making float P40 C3002 C3003 MICOM_DEBUG 12507WS-04L MICOM_RESET R3004 R3007 10K 10K 1 PWM1 MODE_SELECT OPT X3000 LED_R 2 MICOM_DEBUG C3005 32.768KHz +3.4V_ST 3 RETENTION_DISABLE 2.2uF R3011 4 MICOM_RESET 10V R3008 4.7M 10K 5 MODE_SELECT OPT OPT 10K R3013 MICOM_RESET_SW GND SW3000 JTP-1127WEM 2 1 33 R3014 270K OPT C3004 P124/XT2/EXCLKS 0.47uF 0.1uF +3.4V_ST 4 3 16V R3012 P122/X2/EXCLK P41/TI07/TO07 C3001 P137/INTP0 P120/ANI19 P40/TOOL0 P123/XT1 C3000 P121/X1 0.1uF WIFI_EN RESET REGC VDD VSS 48 47 46 45 44 43 42 41 40 39 38 37 MICOM MODEL OPTION AR3001 33 P60/SCLA0 1 36 P140/PCLBUZ0/INTP6 RL_ON I2C_SCL3 I2C_SDA3 P61/SDAA0 2 35 P00/TI00/TXD1 R3029 +3.4V_ST INSTANT_BOOT 33 P62 3 34 P01/TO00/RXD1 POWER_ON/OFF2_4 P63 4 33 P130 INV_CTL P31/TI03/TO03/INTP4 IC3000 P20/ANI0/AVREFP POWER_ON/OFF2_1 R3001 R3018 R3020 R3022 PWM1 5 32 KEY2 10K 10K 10K 10K IR P75/KR5/INTP9/SCK01/SCL01 6 R5F100GEAFB#30 31 P21/ANI1/AVREFM KEY1 R3006 100 P74/KR4/INTP8/SI01/SDA01 7 30 P22/ANI2 MODEL1_OPT_0 0.72V HDMI_CEC MODEL1_OPT_0 POWER_ON/OFF2_2 P73/KR3/SO01 8 29 P23/ANI3 MODEL1_OPT_1 MODEL1_OPT_1 0.72V P72/KR2/SO21 P24/ANI4 POWER_ON/OFF2_3 9 28 MODEL1_OPT_2 MODEL1_OPT_2 0.72V P71/KR1/SI21/SDA21 10 27 P25/ANI5 EYE_SDA MODEL1_OPT_3 MODEL1_OPT_3 3.0V P70/KR0/SCK21/SCL21 11 26 P26/ANI6 EYE_SCL TP3004 P30/INTP3/RTC1HZ/SCK11/SCL11 12 25 P27/ANI7 WOL/WIFI_POWER_ON TP3003 R3003 R3019 R3021 R3023 EYE_SENSOR 2.7K 2.7K 2.7K 75K 13 14 15 16 17 18 19 20 21 22 23 24 AR3000 1/16W 3.3K +3.3V_NORMAL P50/INTP1/SI11/SDA11 P51/INTP2/SO11 P17/TI02/TO02 P16/TI01/TO01/INTP5 P15/PCLBUZ1/SCK20/SCL20 P14/RXD2/SI20/SDA20 P13/TXD2/SO20 P12/SO00/TXD0/TOOLTXD P11/SI00/RXD0/TOOLRXD/SDA00 P10/SCK00/SCL00 P146 P147/ANI18 MICOM MODEL OPTION +3.3V_SB +3.4V_ST 00 (0.72V) 01 (1.53V) 10 (2.27V) 11 (3.0V) R3028 R3024 MODEL_OPT_0 NON LOGO / LCD LOGO / LCD NON LOGO / OLED LOGO / OLED 10K 10K OPT MODEL_OPT_1 TV BOX R3027 100 R3026 0 SOC_RESET OPT MODEL_OPT_2 FHD - UD 8K C B R3025 10K Q3001 SOC_RESET_MICOM NPN_NXP_2nd MODEL_OPT_3 M16 - A5LR M2 E FHD For CEC MODEL_OPT_3 TP3001 C UD/8K M16 RTK H15 - Q3001-*1 B NPN_KEC_1st +3.4V_ST E POWER_DET SOC_RX AMP_MUTE WOL/ETH_POWER_ON EDID_WP POWER_ON/OFF1 SOC_RESET_MICOM SOC_TX PANEL_CTL R3015 R3016 27K 120K G D3000 CEC_BAT54_SUZHO_2nd CEC_REMOTE HDMI_CEC S D D3000-*1 Q3000 CEC_BAT54_TSC_1st SSM3K56FS CEC_FET_TOSHIBA_1st +3.3V_SB G Q3000-*1 RUE003N02 S D R3010 CEC_FET_ROHM_2nd 10K 0 R3017 WOL/ETH_POWER_ON WOL_WAKE_UP_SOC THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 16Y_M2 2015.09.02 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM 30 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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HDMI2_REAR HDMI1_REAR (ARC) C C Q3202-*1 B Q3200-*1 B 2N3904S 2N3904S HPD_TR_KEC E HPD_TR_KEC 5V_HDMI_1 E 5V_DET_HDMI_3 5V_DET_HDMI_1 R3214 R3216 1.8K 1.8K R3215 3.3K VA3205 R3209 R3217 1K 3.3K VA3200 R3200 ESD_HDMI ESD_HDMI 1K R3211 R3202 33 R3212 R3203 33 4.7K OPT 4.7K OPT HDMI_INT_EDID C HDMI_INT_EDID C R3208 VA3206 100K Q3202 B 1K R3201 HDMI_HPD_5V_3 VA3201 100K Q3200 B 1K AMOTECH_2nd R3210 HDMI_HPD_5V_1 MMBT3904(NXP) AMOTECH_2nd R3204 MMBT3904(NXP) HPD_TR_NXP E HPD_TR_NXP E R3213 4.7K AR3234 SHIELD HDMI_EXT_EDID 100 SHIELD 1/16W 20 AR3208 VA3203-*1 VA3206-*1 20 DDC_SCL_1 HP_DET 100 ICVL0518100Y500FR_ INNOCHIPS_1st 1/16W DDC_SDA_1 INNOCHIPS_1st HP_DET VA3201-*1 19 5V 19 INNOCHIPS_1st DDC_SCL_3 5V 18 DDC_SDA_3 GND VA3203 VA3204 VA3204-*1 18 GND AMOTECH_2nd AMOTECH_2nd INNOCHIPS_1st 17 VA3207 VA3208 DDC_DATA 17 AMOTECH_2nd AMOTECH_2nd VA3207-*1 VA3208-*1 DDC_DATA 16 DDC_CLK INNOCHIPS_1st INNOCHIPS_1st 16 DDC_CLK 15 ARC 15 HDMI_ARC 14 ARC ARC CE_REMOTE 14 CEC_REMOTE CE_REMOTE 13 CEC_REMOTE VA3209 CK- 13 CK- ESD_HDMI 12 CK_GND AR3205 5.1 CK-_HDMI3 EAG59023302 12 CK_GND 11 1/16W CK+ CK+_HDMI3 EAG59023302 11 10 CK+ AR3232 10 5.1 CK-_HDMI1 D0- 1/16W 9 D0- CK+_HDMI1 D0-_HDMI3 9 D0_GND 8 D0_GND D0+_HDMI3 8 D0+ D0-_HDMI1 7 D0+ 7 D0+_HDMI1 D1- 6 D1- 6 D1_GND 5 D1_GND AR3206 5 D1+ 5.1 D1-_HDMI3 4 1/16W D1+ AR3233 D1+_HDMI3 4 5.1 D2- 1/16W 3 D2- 3 D2_GND D1-_HDMI1 2 D2-_HDMI3 D2_GND D1+_HDMI1 2 D2+ 1 D2+_HDMI3 D2+ 1 D2-_HDMI1 D2+_HDMI1 JK3201 JK3202 YKF45-7058V YKF45-7058V +5V_NORMAL A1 A2 MMBD6100 D3201 C AR3231 E 4.7K 2N3904S DDC_SDA_3 Q3201-*1 B EXT_EDID_TR_KEC DDC_SCL_3 C 5V_HDMI_1 +5V_NORMAL A1 A2 E EXT_EDID_TR_NXP MMBD6100 MMBT3904(NXP) EDID_WP D3200 Q3201 B C HDMI_EXT_EDID_ATMEL C IC3201 AT24C02C-SSHM-T HDMI_EXT_EDID R3205 4.7K A0 VCC 1 8 A1 WP 2 7 AR3207 4.7K HDMI_EXT_EDID A2 SCL 3 6 AR11202 33 GND SDA DDC_SCL_1 4 5 DDC_SDA_1 HDMI_EXT_EDID_ROHM IC3201-*1 BR24G02FJ-3GTE2 A0 VCC 1 8 A1 WP 2 7 A2 SCL 3 6 GND SDA 4 5 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L16_SS 2015/08/15 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI_R2 033 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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PARK ELECTRONICS_1st KSD_2nd SPDIF OUT HP OUT +3.3V_NORMAL PEJ034-01 JK3402 JK3402-*1 B50(512-10)F4-03A-A013-B52 SPDIF-FOXCONN_1st E_SPRING +3.3V_NORMAL E_SPRING 3 3 JK3400-*1 RIN1 TP3400 RIN1 2F01TC1-CLM97-4F SPDIF-SOLTEAM_2nd GND 1 DOUT1 TP3401 DOUT1 R3406 GND Fiber Optic 1 10K Fiber Optic JST1223-001 HP_OUT R3403 JK3400 VCC 2 R_SPRING R_SPRING 4 VCC HP_OUT_ONLY 0 4 HP_ROUT 2 SPDIF_OUT R3404 T_SPRING VIN HP_OUT_ONLY 0 T_SPRING 5 5 3 VINPUT HP_LOUT 3 4 R3405 B_TERMINAL2 B_TERMINAL2 7B 4 HP_OUT 100 7B SPDIF_OPTIC HP_DET SHIELD OPT C3401 FIX_POLE C3400 18pF T_TERMINAL2 T_TERMINAL2 6B 6B 1uF 50V HP_OUT_VARISTOR_INNOCHIPS_1st 10V HP_LINE_OUT HP_LINE_OUT VA3408 VA3409 VA3400 ESD Ready R3403-*1 R3404-*1 5.6V 5.6V 5.6V 150 150 HP_OUT_VARISTOR_AMOTECH_2nd VA3400-*1 VA3408-*1 VA3409-*1 5.6V 5.6V 5.6V HP_OUT_VARISTOR_AMOTECH_2nd Internal HP OUT +3.4V_ST OPT P3400 P3401 12507WS-04L C3402 12525HS-04A(1.2T) 22uF HP_OUT HP_OUT L3402 BLM15PX121SN1 HP_ROUT HP_OUT 16V HP_OUT HP_OUT R3412 1 1 C3422 R3402 HP_ROUT_SOC 1K C3423 10K 4.7uF 0.22uF OPT 10V 10V SOC_RX 2 2 OPT R3416 HP_OUT C3403 10K 22uF 3 3 L3401 HP_OUT BLM15PX121SN1 4 4 HP_LOUT SOC_TX HP_OUT 16V R3413 HP_OUT HP_OUT HP_LOUT_SOC 1K C3424 C3425 5 4.7uF 0.22uF 10V 10V GND VCC TX RX JP-BLOCK-RS232C JP11205 Place at JACK SIDE UART for Debug AV/COMPONENT REAR JK3401 PPJ245-31 R3422 6E [RD2]E-LUG 10K COMP_VARISTOR_INNOCHIPS_1st COMP2_R_IN R3417 R3424 [RD2]O-SPRING VA3410 470K 330pF 12K 5E 5.6V C3404 R3423 4E [RD2]CONTACT 10K COMP2_L_IN +3.3V_NORMAL COMP_VARISTOR_INNOCHIPS_1st R3418 R3425 [WH]O-SPRING VA3411 470K 330pF 12K 5D C3405 5.6V R3426 10K R3428 4C [RD1]CONTACT 1K COMP2_DET R3409 COMP_VARISTOR_INNOCHIPS_1st 5C [RD1]O-SPRING 0 COMP2_Pr+ VA3416 5.6V VA3416-*1 COMP_VARISTOR_INNOCHIPS_1st R3419 OPT OPT [RD1]E-LUG-S C3407 C3408 5.6V 7C VA3412 75 COMP_VARISTOR_AMOTECH_2nd 5.5V 27pF 27pF 50V R3408 50V 5B [BL]O-SPRING 0 COMP2_Pb+ COMP_VARISTOR_INNOCHIPS_1st R3420 OPT OPT +3.3V_NORMAL 4A [GN/YL]CONTACT VA3413 75 C3409 C3410 5.5V 27pF 27pF 50V 50V R3427 R3429 5A [GN/YL]O-SPRING 10K 1K COMP_VARISTOR_INNOCHIPS_1st AV_CVBS_DET OPT [GN/YL]E-LUG VA3414 C3406 6A 5.6V 0.1uF R3407 16V 0 COMP2_Y+/AV_CVBS_IN COMP_VARISTOR_AMOTECH_2nd OPT OPT COMP_VARISTOR_INNOCHIPS_1st R3421 C3411 C3412 VA3410-*1 VA3411-*1 VA3414-*1 VA3415 75 27pF 27pF 5.6V 5.6V 5.6V 5.5V 3216 50V 50V R3430 0 DTV/MNT_VOUT DTV/MNT_VOUT R3431 DTV/MNT_VOUT C3420 1/4W C3421 390pF 390pF 75 1% VA3412-*1 VA3413-*1 VA3415-*1 50V 5.5V 5.5V 5.5V 50V DTV/MNT_VOUT DTV/MNT_VOUT THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES COMP_VARISTOR_AMOTECH_2nd PLACE CLOSE TO JACK PLACE CLOSE TO SOC SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. M2_Simple Smart 2015.07.07 FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR JACK 34 THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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IR +3.4V_WIFI OCP +3.4V_ST +3.4V_WIFI L4000 Delete for voltage drop IC4001 P4001 TJ2242GSF6 SMAW200-H14S5K C4013 C4007 C4005 10uF 10uF 0.1uF 10V 10V 16V IN OUT 1 2 1 6 WOL/WIFI_POWER_ON R4004 +3.4V_ST R4005 2.2 C4012 100 3 4 WIFI_DM 0.1uF 16V GND ILIMIT C4001 R4007 2.2 2 5 R4002 +3.4V_ST 5 6 WIFI_DP 3.3K 0.1uF 16V OPT OPT OPT R4015 7 8 D4001 C4004 C4008 33 EN FLAG R4016 RCLAMP0502BA 5pF 5pF R4010 WIFI_EN 3 4 14K R4009 10K 1/16W IR GND 10K 9 10 50V 50V OPT R4001 Place Near Wafer R4013 5% C4014 1% 33 R4014 11 12 100 KEY1 0.1uF IR 10K KEY2 16V C4010 +3.4V_ST ILIM 1.036A 100pF 13 14 OPT 50V C4006 0.1uF 15 OPT LED_R C4002 R4011 OPT 1000pF C4011 50V 1.8K 0.1uF 16V IR_PROTO IR_PROTO IC4000 AO-R123C7G-LG +3.4V_ST GND G IR_PROTO R4000 VS 330 V IR_PROTO R4003 OUT 47 O IR THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M2 2015/07/07 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/KEY/WIFI 40 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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USB REAR MAX 1.5A +5V_USB_1 OCP USB2_2.0 JK5001 OPT KEC_2nd NXP_1st C4301 C4303 C4305 C4307 C4309 US-04A-VSD ZD4301-*1 ZD4301 10uF 10uF 10uF 10uF 10uF +5V_NORMAL +5V_USB_1 5V 5V 10V 10V 10V 10V 10V IC4301 1 TJ2242GSF6 R4300 2.2 USB_DM1 2 IN OUT +3.3V_NORMAL 1 6 R4301 C4310 2.2 0.1uF USB_DP1 3 GND ILIMIT 16V 2 5 value change R4306 OPT 4.7K 10K(2.63V) --> 4.7K(2.97V) D4302 4 EN FLAG RCLAMP0502BA USB_CTL1 3 4 JP4301 /USB_OCD1 OPT JP-BLOCK-USB 5 R4308 ILIM 1.38A R4304 10K DM VBUS 10K 1% DP GND THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L16_SS 2015/08/15 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR 044 THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_R1 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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Ethernet Block C5000 C5001 0.1uF 0.01uF 16V 50V HONGLIN_3rd Freeport_2nd UDE_1st JK5000-*2 JK5000-*1 JK5000 B50(512-10)F4-03A-A013-B52 26TM9G-30100-02HF RJ45VT-01SN002 1 1 1 1 1 1 EPHY_TDP 2 2 2 2 2 2 3 3 3 3 3 3 EPHY_TDN 4 4 4 4 4 4 EPHY_RDP 5 5 5 5 5 5 6 6 6 6 6 6 EPHY_RDN 7 7 7 7 7 7 D5000 D5001 D5002 D5003 8 8 8 5.5V 5.5V 5.5V 5.5V 8 8 8 LAN_ESD LAN_ESD LAN_ESD LAN_ESD 9 9 9 9 9 9 LANJACK-GND LANJACK-GND BLM15PX121SN1 BLM15PX121SN1 L5001 L5002 R5001 R5002 0 0 For ESD THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. 16Y_M2 2015.09.02 FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR ETHERNET 50 THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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AUDIO AMP(NTP7515) **Apply 6PIE PAD for Audio Amp Coil AMP_COIL_TDK_2nd R5614 100 L5602-*1 +19V +19V_AMP AMP_RESET_N 10.0uH C5624 R5615 1000pF 4.7K L5600 50V TAIYO YUDEN_1st UBW2012-121F +3.3V_NORMAL L5602 10.0uH SPK_L+ NRS6045T100MMGK 22000pF 50V L5601 AUD_SCK C5606 R5606 BLM18PG121SN1D +19V_AMP 3.3 1/10W R5610 C5620 0.1uF 4.7K 50V [EP]GND C5605 C5612 390pF VDD_IO GND_IO PGND1A PVDD1A PVDD1B 0.1uF C5608 50V CLK_I RESET BST1A OUT1A 10uF 16V 25V C5618 0.47uF 50V AD C5613 390pF 50V C5621 R5611 R5607 0.1uF 50V 4.7K SPEAKER_L 3.3 40 39 38 37 36 35 34 33 32 31 1/10W AMP_COIL_TAIYO_1st L5605 NC_1 1 30 OUT1B 10.0uH SPK_L- NRS6045T100MMGK OPT VDD_PLL 2 29 PGND1B C5610 C5600 THERMAL 22000pF AMP_COIL_TDK_2nd 1uF NC_2 3 41 28 BST1B 50V L5605-*1 P5600 10V 10.0uH WAFER-ANGLE GND 4 27 VDR1 NTP7515 NC_3 5 IC5600 26 NC_5 SPK_L+ C5601 4 1uF DVDD 6 NTP7515 25 AGND 10V SPK_L- AUD_LRCH SDATA 7 24 VDR2 C5616 C5617 3 WCK 0x54 BST2A 1uF 1uF SPK_R+ AUD_LRCK 8 23 10V 10V 2 NC_4 9 22 PGND2A C5611 SPK_R- 1 AR5601 22000pF 100 AMP_COIL_TDK_2nd I2C_SDA1 SDA 10 21 OUT2A 50V L5603-*1 I2C_SCL1 10.0uH Black : Box_Type 11 12 13 14 15 16 17 18 19 20 C5602 C5604 33pF 33pF 50V 50V AMP_COIL_TAIYO_1st L5603 10.0uH SCL FAULT MONITOR_0 MONITOR_1 MONITOR_2 BST2B PGND2B OUT2B PVDD2B PVDD2A SPK_R+ AMP_MUTE_KEC_TR_1st NRS6045T100MMGK +3.3V_NORMAL C B Q5600-*1 +19V_AMP 2N3904S R5608 3.3 R5601 10K E 1/10W C5622 R5612 R5605 0.1uF 4.7K 100 C5609 C5614 C5619 50V 10uF 390pF 0.47uF R5600 C 25V 50V 50V SPEAKER_R C5615 10K AMP_MUTE_NXP_TR_2nd C5603 390pF B Q5600 50V AMP_MUTE 1000pF C5623 R5613 MMBT3904(NXP) 50V C5607 22000pF R5609 0.1uF 4.7K E 3.3 AMP_COIL_TAIYO_1st 50V 50V L5604 [EP]GND WOOFER_MUTE 1/10W VDD_IO GND_IO PGND1A PVDD1A PVDD1B OPT 10.0uH CLK_I RESET BST1A OUT1A R5604 SPK_R- 100 NRS6045T100MMGK AD POWER_DET AMP_COIL_TDK_2nd 40 39 38 37 36 35 34 33 32 31 L5604-*1 NC_1 1 30 OUT1B 10.0uH VDD_PLL 2 29 PGND1B THERMAL NC_2 3 41 28 BST1B GND 4 27 VDR1 NTP7515D NC_3 5 IC5600-*1 26 NC_5 TP5600 WOOFER_MUTE DVDD 6 NTP7515D 25 AGND SDATA 7 24 VDR2 WCK 8 23 BST2A NC_4 9 22 PGND2A SDA 10 21 OUT2A 11 12 13 14 15 16 17 18 19 20 SCL FAULT MONITOR_0 MONITOR_1 MONITOR_2 BST2B PGND2B OUT2B PVDD2B PVDD2A THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M2 2015/07/07 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR AMP 56 THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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FE_DEMOD1_TS_ERROR R651 33 I2C_SCL2_TU I2C_SCL2 C6506 +3.3V_TUNER Ground Width >= 24mils 33 47pF 50V R652 I2C_SDA2 1. should be guarded by ground I2C_SDA2_TU 2. No via on both of them C6503 TU_CVBS_220ohm 47pF 3. Signal Width >= 12mils 50V R6516-*1 R6517-*1 220 220 Signal to Signal Width = 12mils C6520 TU_CVBS_200ohm close to Tuner +3.3V_TUNER 0.1uF R6516 R6517 16V 200 200 +3.3V_NORMAL R6501 TU_CVBS 0 OPT E BLM15PX121SN1 +3.3V_LNA_TU C6500 R6525 0 E +3.3V_TUNER 0.1uF CVBS_TR_NXP_2nd CVBS_TR_KEC_1st L6504 B Q6501 Q6501-*1 MMBT3906(NXP) B 2N3906S-RTK C OPT C TU_CVBS_TU R6507 0 C6501 C6522 10uF 10uF 10V 10V close to Tuner +3.3V_TUNER LH60_1Kohm IF_FILTER R6506 1K IF_AGC_TU IF_AGC R6523 C6502 470 R6524 0.1uF LH57_100ohm 82 16V R6506-*1 TU_SIF 100 E C6521 E TU_SIF_TU Q6502 0.1uF R6522 B 2N3906S-RTK SIF_TR_NXP_2nd IF_NON_FILTER IF_NON_FILTER 4.7K SIF_TR_KEC_1st 16V B Q6502-*1 C R6503-*1 R6502-*1 MMBT3906(NXP) 0 0 IF_FILTER C R6502 47 IF_P_TU C6504 IF_P C6510 33pF should 10pF R6503 be guarded by ground,Match GND VIA 47 OPT OPT IF_N_TU C6505 IF_N C6511 IF_FILTER 33pF 10pF OPT OPT TU_N/D R6505 TU_N/D 100 /TU_RESET1 /TU_RESET1_TU C6507 16V +3.3V_TUNER TU_N/D 0.1uF R6504 0 C6509 0.1uF +3.3V_TU TU_N/D close to Tuner TS_AR_0ohm AR6500 0 1/16W FE_DEMOD1_TS_ERROR_TU FE_DEMOD1_TS_ERROR FE_DEMOD1_TS_CLK_TU FE_DEMOD1_TS_CLK FE_DEMOD1_TS_SYNC_TU FE_DEMOD1_TS_SYNC FE_DEMOD1_TS_VAL_TU FE_DEMOD1_TS_VAL TS_AR_47ohm AR6500-*1 47 TS_AR_0ohm AR6501 0 1/16W FE_DEMOD1_TS_DATA_TU[0] FE_DEMOD1_TS_DATA[0] FE_DEMOD1_TS_DATA_TU[1] FE_DEMOD1_TS_DATA[1] FE_DEMOD1_TS_DATA_TU[2] FE_DEMOD1_TS_DATA[2] FE_DEMOD1_TS_DATA_TU[3] FE_DEMOD1_TS_DATA[3] TS_AR_47ohm AR6501-*1 47 TS_AR_0ohm AR6502 0 1/16W FE_DEMOD1_TS_DATA_TU[4] FE_DEMOD1_TS_DATA[4] FE_DEMOD1_TS_DATA_TU[5] FE_DEMOD1_TS_DATA[5] FE_DEMOD1_TS_DATA_TU[6] FE_DEMOD1_TS_DATA[6] FE_DEMOD1_TS_DATA_TU[7] FE_DEMOD1_TS_DATA[7] TS_AR_47ohm AR6502-*1 47 D_Demod_Core F_NIM/MCP F_NIM/MCP POWER_ON/OFF2_3 IC6700 TU_N/D_1.2V TJ2132GDP R6706-*1 [EP]GND 5.1K R6706 10K 10K +3.4V_ST POK GND R1 R6700 1 8 F_NIM/MCP F_NIM/MCP THERMAL R2 R6705-*1 R6705 EN FB TU_N/D_1.2V 9 4.7K 2 7 C6708 10.5K L6700 BLM15PX121SN1 0.01uF F_NIM/MCP IN OUT 50V 3 6 F_NIM/MCP C6703 F_NIM/MCP C6700 10uF 0.1uF 10V +5V_NORMAL BIAS 4 2A 5 SS F_NIM/MCP F_NIM/MCP C6707 C6709 2700pF 10uF 50V 10V F_NIM/MCP C6705 1uF 10V F_NIM/MCP Vout=0.6*(1+R2/R1) THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 16Y_M2 2015.09.02 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_1 65 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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TU_KR/US TU_AJ/JA TU_TW/BR TU_CHINA TU6703 TU6700 TU6702 TU6701 TDJS-H301F TDJS-G301D VA4S1BD5410 TDJN-C301D SCL_RF SCL_RF SCL SCL_RF 1 1 1 1 I2C_SCL2_TU SDA_RF SDA_RF SDA SDA_RF 2 2 2 2 I2C_SDA2_TU B1[+3.3V_RF] B1[+3.3V_RF] B1[+3.3V] B1[+3.3V_RF] 3 3 3 3 +3.3V_LNA_TU CVBS CVBS CVBS CVBS 4 4 4 4 TU_CVBS_TU IF_AGC IF_AGC IF_AGC IF_AGC 5 5 5 5 IF_AGC_TU SIF SIF SIF SIF 6 6 6 6 TU_SIF_TU IF[N] IF[N] IF[N] IF[N] 7 7 7 7 IF_N_TU IF[P] IF[P] IF[P] IF[P] 8 8 8 8 IF_P_TU GND 9 9 9 9 RESET_DEMOD 10 /TU_RESET1_TU SHIELD SHIELD SHIELD B2[+3.3V_DEMOD] 11 +3.3V_TU NC 12 B3[+1.2V_DEMOD] 13 D_Demod_Core ERROR 14 FE_DEMOD1_TS_ERROR_TU MCLK 15 FE_DEMOD1_TS_CLK_TU SYNC 16 FE_DEMOD1_TS_SYNC_TU VALID 17 FE_DEMOD1_TS_VAL_TU D0 18 FE_DEMOD1_TS_DATA_TU[0] D1 19 FE_DEMOD1_TS_DATA_TU[1] D2 20 FE_DEMOD1_TS_DATA_TU[2] D3 21 FE_DEMOD1_TS_DATA_TU[3] D4 22 FE_DEMOD1_TS_DATA_TU[4] D5 23 FE_DEMOD1_TS_DATA_TU[5] D6 24 FE_DEMOD1_TS_DATA_TU[6] D7 25 FE_DEMOD1_TS_DATA_TU[7] 26 SHIELD THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 16Y_M2 2015.09.02 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_2 67 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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LVDS [30Pin LVDS +3.3V_NORMAL Connector] P7201 10031HR-30 OPT OPT R8120 AGP R8121 3.3K R8119 3.3K 1.8K 1 AGP NON_AGP R8118-*1 AGP VCOM 2 0 R8118 AR7201 2.2K 0 3 I2C_SDA1 4 I2C_SCL1 5 6 TXA0N 7 TXA0P 8 9 TXA1N 10 TXA1P 11 12 TXA2N 13 TXA2P 14 15 TXACLKN 16 TXACLKP 17 18 TXA3N 19 TXA3P 20 21 22 23 24 PANEL_VCC 25 26 27 28 29 30 31 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS HD_LVDS 2015/08/15 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. L16_SS 073 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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eMMC I/F DVDD18_EMMC 3.3v power delete, 131120 R8116 R8117 1/16W 10K AR8104 1/16W 10K AR8103 10K 10K EMMC_HYNIX IC8100 IC8100-*1 THGBMBG5D1KBAIL EMMC_DATA[0-7] H26M31001HPR AR8100 EMMC_DATA[0] 0 1/16W EMMC_DATA[1] A3 C8 EMMC_DATA[2] DAT0 NC_23 DAT6 A3 C8 A4 C9 DAT0 NC_22 DAT1 NC_24 A4 C9 EMMC_DATA[3] A5 C10 DAT1 NC_23 DAT2 NC_25 A5 C10 EMMC_DATA[4] B2 C11 DAT2 NC_24 DAT3 NC_26 B2 C11 EMMC_DATA[5] B3 C12 DAT3 NC_25 DAT4 NC_27 B3 C12 EMMC_DATA[6] B4 C13 DAT4 NC_26 DAT5 NC_28 B4 C13 B5 C14 DAT5 NC_27 EMMC_DATA[7] DAT6 NC_29 B5 C14 B6 D1 DAT6 NC_28 DAT7 NC_30 DAT5 B6 D1 D2 DAT7 NC_29 0 R8104 NC_31 D2 D3 NC_30 0 R8105 NC_32 D3 M6 D4 NC_31 0 R8106 CLK NC_33 M6 D4 M5 D12 CLK NC_32 0 R8107 CMD NC_34 M5 D12 D13 CMD NC_33 eMMC V5.0 GND NC_35 D13 D14 NC_34 NC_36 D14 A6 E1 NC_35 VSS_1 NC_37 A6 E1 A7 E2 RFU_1 NC_36 RFU_2 NC_38 A7 E2 C5 E3 RFU_2 NC_37 NC_21 NC_39 C5 E3 AR8102 E5 E12 RFU_3 NC_38 RFU_4 NC_40 E5 E12 0 1/16W E8 E13 RFU_4 NC_39 RFU_5 NC_41 E8 E13 E9 E14 RFU_5 NC_40 EMMC_CLK VSF_1 NC_42 E9 E14 E10 F1 RFU_6 NC_41 DAT7 EMMC_CMD VSF_2 NC_43 E10 F1 F10 F2 RFU_7 NC_42 EMMC_RST VSF_3 NC_44 F10 F2 G3 F3 RFU_8 NC_43 RFU_9 NC_45 G3 F3 G10 F12 RFU_9 NC_44 RFU_10 NC_46 G10 F12 H5 F13 RFU_10 NC_45 DS NC_47 H5 F13 J5 F14 RFU_11 NC_46 C8107 VSS_5 NC_48 J5 F14 10pF K6 G1 RFU_12 NC_47 OPT RFU_13 NC_49 K6 G1 50V K7 G2 RFU_13 NC_48 RFU_14 NC_50 K7 G2 EMMC_STRB K10 G12 RFU_14 NC_49 RFU_15 NC_51 K10 G12 P7 G13 RFU_15 NC_50 R8103 RFU_16 NC_52 P7 G13 P10 G14 RFU_16 NC_51 10K RFU_17 NC_53 P10 G14 H1 RFU_17 NC_52 NC_54 EMMC_STRB H1 H2 NC_53 NC_55 H2 K5 H3 NC_54 RSTN NC_56 K5 H3 H12 RSTN NC_55 C8100 DVDD18_EMMC H12 EMMC5.0_4G_TOSHIBA NC_57 OPT 0.1uF H13 NC_56 NC_58 H13 16V C6 H14 NC_57 VCCQ_1 NC_59 C6 H14 3.3V_EMMC M4 J1 VCCQ_1 NC_58 VCCQ_2 NC_60 M4 J1 N4 J2 VCCQ_2 NC_59 VCCQ_3 NC_61 N4 J2 P3 J3 VCCQ_3 NC_60 VCCQ_4 NC_62 P3 J3 Bottom P5 J12 VCCQ_4 NC_61 VCCQ_5 NC_63 P5 J12 DAT3 DAT4 DAT5 DAT6 EMMC_CLK_BALL EMMC_CMD_BALL EMMC_RESET_BALL OPT OPT J13 VCCQ_5 NC_62 C8108 C8109 C8105 C8106 NC_64 J13 0.1uF 2.2uF 0.1uF 2.2uF J14 EMMC_RESET_BALL NC_63 NC_65 J14 16V 10V 16V 10V E6 K1 NC_64 VCC_1 NC_66 E6 K1 F5 K2 VCC_1 NC_65 VCC_2 NC_67 F5 K2 J10 K3 VCC_2 NC_66 VCC_3 NC_68 J10 K3 K9 K12 VCC_3 NC_67 VCC_4 NC_69 K9 K12 K13 VCC_4 NC_68 NC_70 K13 EMMC_VDDI K14 NC_69 Bottom pattern 0.2mm NC_71 K14 C2 L1 NC_70 VDDI NC_72 C2 L1 LH57/LH58 LH60 L2 VDDI NC_71 C8101 C8104 NC_73 L2 0.1uF 2.2uF L3 NC_72 NC_74 L3 50V 10V E7 L12 NC_73 VSS_2 NC_75 C4 L12 G5 L13 VSSQ_1 NC_74 VSS_3 NC_76 E7 L13 H10 L14 VSS_1 NC_75 VSS_4 NC_77 G5 L14 LH57/LH58 K8 M1 VSS_2 NC_76 LH60 VSS_6 NC_78 H10 M1 C8102 C8103 C8111 C4 M2 VSS_3 NC_77 0.1uF 2.2uF 4.7uF VSSQ_1 NC_79 K8 M2 N2 M3 EMMC_CLK_BALL VSS_4 NC_78 16V 10V 10V VSSQ_2 NC_80 N2 M3 N5 M7 VSSQ_2 NC_79 VSSQ_3 NC_81 N5 M7 P4 M8 VSSQ_3 NC_80 VSSQ_4 NC_82 P4 M8 P6 M9 VSSQ_4 NC_81 VSSQ_5 NC_83 P6 M9 M10 VSSQ_5 NC_82 NC_84 M10 M11 NC_83 NC_85 M11 M12 NC_84 NC_86 M12 A1 M13 NC_85 DAT3 NC_1 NC_87 A1 M13 A2 M14 NC_1 NC_86 DAT4 NC_2 NC_88 A2 M14 A8 N1 NC_2 NC_87 DAT7 NC_3 NC_89 A8 N1 A9 N3 EMMC_CMD_BALL NC_3 NC_88 NC_4 NC_90 A9 N3 A10 N6 NC_4 NC_89 NC_5 NC_91 A10 N6 A11 N7 NC_5 NC_90 NC_6 NC_92 A11 N7 A12 N8 NC_6 NC_91 NC_7 NC_93 A12 N8 A13 N9 NC_7 NC_92 NC_8 NC_94 A13 N9 A14 N10 NC_8 NC_93 NC_9 NC_95 A14 N10 B1 N11 NC_9 NC_94 NC_10 NC_96 B1 N11 B7 N12 NC_10 NC_95 NC_11 NC_97 B7 N12 B8 N13 NC_11 NC_96 NC_12 NC_98 B8 N13 B9 N14 NC_12 NC_97 DAT6 NC_13 NC_99 B9 N14 B10 P1 NC_13 NC_98 NC_14 NC_100 B10 P1 B11 P2 NC_14 NC_99 NC_15 NC_101 B11 P2 B12 P8 NC_15 NC_100 Don’t Connect Power At VDDI EMMC_VDDI DVDD18_EMMC B13 B14 NC_16 NC_17 NC_102 NC_103 P9 P11 B12 B13 NC_16 NC_17 NC_101 NC_102 P8 P9 NC_18 NC_104 B14 P11 C1 P12 NC_18 NC_103 (Just Interal LDO Capacitor) DAT5 C3 NC_19 NC_20 NC_105 NC_106 P13 C1 C3 NC_19 NC_104 P12 P13 C7 P14 NC_20 NC_105 NC_22 NC_107 C7 P14 NC_21 NC_106 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 16Y_M2 2015.09.02 ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. eMMC 81 Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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RS-232C Control INTERFACE AR11201 +3.4V_ST 100 DOUT1 RIN1 OPT OPT VA11200 VA11201 ADUC 20S 02 010L ADUC 20S 02 010L RS232C 20V 20V RS232C C11204 IC11200 0.1uF MAX3232CDR C1+ VCC RS232C 1 16 C11200 0.1uF V+ GND RS232C 2 15 C11201 0.1uF C1- DOUT1 3 14 C2+ RIN1 RS232C 4 13 C11202 0.1uF C2- ROUT1 5 12 SOC_RX V- DIN1 RS232C 6 11 SOC_TX C11203 0.1uF DOUT2 DIN2 7 10 RIN2 ROUT2 8 9 EAN41348201 GND JIG POINT JP11201 JP11202 JP11203 JP11204 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. 16Y_M2 2015.09.02 FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR RS232C 112 THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Copyright © 2016 LG Electronics Inc. All rights reserved. LGE Internal Use Only Only for training and service purposes

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